Clock Mode; Operations In Each Clock Mode - Fujitsu F2MC-8L F202RA Hardware Manual

CHAPTER 3 CPU
3.6.4

Clock Mode

The clock speed is switched by selecting one of four frequency-divided source clocks
(gears).
■

Operations in Each Clock Mode

Table 3.6-2 Operations in Each Clock Mode
Clock speed
Standby
SYCC register
mode
(SYCC: CS1
and CS0)
RUN
High
speed
(1, 1)
Sleep
RUN
(1, 0)
Sleep
RUN
(0, 1)
Sleep
RUN
(0, 0)
Sleep
Low
speed
Each clock mode allows transition to a corresponding standby (sleep/stop) mode. For details of standby
mode, see Section "3.7 Standby Mode (Low-Power Consumption Mode) ".
■
Gears (Clock Speed Switching Function)
Writing one of 00
control register selects one of four clock speeds.
The CPU and peripheral circuits operate using the clock speed selected. However, the gear does not affect
the time-base timer.
Power consumption can be reduced by lowering the clock speed.
58
Clock
Generated
Stop Stopped
Generated
Stop Stopped
Generated
Stop Stopped
Generated
Stop Stopped
to 11 into the clock speed selection bits (SYCC: CS1 and CS0) in the system clock
B B
Operating clock in each block
time-base
CPU
timer
F /4
CH
F /2
CH
Stopped
Stopped
F /8
CH
F /2
CH
Stopped
Stopped
F /16
CH
F /2
CH
Stopped
Stopped
F /64
CH
F /2
CH
Stopped
Stopped
Cause that cancels
standby mode
Peripheral
(excepting reset)
function
Interrupt request
F /4
CH
Stopped External interrupt
Interrupt request
F /8
CH
Stopped External interrupt
Interrupt request
F /16
CH
Stopped External interrupt
Interrupt request
F /64
CH
Stopped External interrupt