12-Bit Ppg Control Register 1 (Rcr21) - Fujitsu F2MC-8L F202RA Hardware Manual

CHAPTER 9 12-BIT PPG TIMER
9.4.1

12-bit PPG Control Register 1 (RCR21)

The 12-bit PPG control register 1 comprises bits for count clock selection of the 12-bit
PPG timer and bits for setting the "H" width.
■
12-bit PPG Control Register 1 (RCR21)
Address bit7 bit6
0014 RCK1 RCK0 HSC5 HSC4 HSC3 HSC2 HSC1 HSC0
H
R/W R/W
R/W : Readable/Writable
: Initial value
Table 9.4-1 Explanation of Functions of Each Bit in 12-bit PPG Control Register 1 (RCR21)
Bit name
RCK1, RCK0:
bit7,
Count clock
bit6
selection bits
bit5 HSC5 to HSC0:
to "H" width setting
bit0 bits
214
Figure 9.4-2 12-bit PPG Control Register 1 (RCR21)
bit5 bit4 bit3 bit2
R/W R/W R/W R/W
HSC5 to HSC0
Compare value for the "H" width of 12-bit PPG outputs.
XXXXXX
RCK1 RCK0
0 0
0 1
1 0
1 1
These bits are used to select a count clock of the 12-bit PPG timer from four types of
internal count clocks.
These bits are used to set the number of counts corresponding to the "H" width of
12-bit PPG timer outputs (the compare value for the "H" width), and the contents of
these bits and the HSC6 to HSC11 bits of the RCR22 register are compared with a
count by the counter.
bit1 bit0
Initial value
00000000
B
R/W R/W
"H" width setting bits
Count clock selection bits
2 t
INST
4 t
INST
16 t
INST
256 t
INST
Function