A Signal Descriptions; Amba Interface Signals - Epson ARM720T Core Cpu Manual

A
Signal Descriptions
This chapter describes the interface signals of the ARM720T processor. It contains the
following sections:
A.1 AMBA interface signals .............................................................................A-1
A.2 Coprocessor interface signals ....................................................................A-2
A.3 JTAG and test signals ................................................................................A-3
A.4 Debugger signals ........................................................................................A-4
A.5 Embedded trace macrocell interface signals.............................................A-5
A.6 ATPG test signals.......................................................................................A-7
A.7 Miscellaneous signals.................................................................................A-7
A.1

AMBA interface signals

The AMBA interface signals are shown in Table A-1.
Signal name
HCLK
HADDR[31:0]
HTRANS[1:0]
HBURST[2:0]
HWRITE
HSIZE[2:0]
HPROT[3:0]
HGRANT
HREADY
HRESP[1:0]
HWDATA[31:0]
HRDATA[31:0]
HBUSREQ
HLOCK
HCLKEN
HRESETn
ARM720T CORE CPU MANUAL
Table A-1 AMBA interface signals
Type Description
Input Bus clock. This is the only clock on the ARM720T processor.
Output 32-bit system address bus.
Output Indicates type of current transfer.
Output Indicates burst length of current transfer.
Output Indicates direction of current transfer.
Output Indicates size of current transfer.
Output Protection control signals
Input Bus transfer granted.
Input Indicates that the current transfer has finished.
Input Indicates transfer status.
Output Write data bus.
Input Read data bus.
Output Bus transfer request.
Output Indicates locked access.
Input Bus clock enable.
Input Global reset.
EPSON
A: Signal Descriptions
A-1