GE PAC 4020 System Manual page 7

7X, lQ Locations
Core
MDR
i
0-3 Direct
Memory Access
Channels
El
Memory
Multiplexer
TIM/ TOM ,, , Op Code
'
'
'
0- 7 Arithmetic {
Unit
1/0
Channels,
4 1 - - - - - - " " - - - - - - 9 1
1 I/ O Buffer
i
B
Main
Adder
(Parallel)
A
p
Operand Address
Serial Adder
A Register I/ O Channels
Figure 1
GE/PAC 4020 Computer Simplified Block Diagram
Overflow flip-flop (OVRF). Operations ex-
ceeding the capacity of the "A" register cause a
carry to propagate into the sign bit position, setting
this flip-flop. Examples are all arithmetic oper-
ations, whether fixed-point or floating-point, and ·.
arithmetic shifts. Floating-point underflow is de..:.
tected by the floating-point quasi' s; the result is
replaced by zero.
Permit automatic interrupt flip-flop (PAIF).
Actually two flip-flops, this function can permit all
4
'
the interrupt levels, inhibit just the so-called
"inhibitable" interrupts (!All), or inhibit all of them
(IAI2). The first pulse reaching an inhibited portion
of the API system will be stored in its flip-flop, but
act_ion will not be taken until a permit automatic
interrupt (PAI) instruction enables the system again.
Trapping mode flip-flop (TMFF). This enables
or disables the GE/PAC 4020 computer's Quadritect
memory protection.