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CODE
LXC
LXK
MAQ
MPY
NEG
NOP
OOM
OPR
ORA
OUT
PAI
RBK
RBL
RCS
REL
REV
RNZ
ROD
RST
SBK
SEL
SET
SEV
SKA
SLA
SLL
SNZ
SOD
SPB
SRA
SRC
SRL
SSA
STA
STI
STM
STQ
STX
SUB
TER
TES
TEV
TNM
TNZ
TOD
TOR
TOS
TSC
TXH
TZC
TZE
XEC
**TIM/TOM
NAME
Load Index with Count
Load Index with K
Move A to
Q
Multiply
Negate
No Operation
Operate on Memory
Operate Device D
OR to
A,
Output to Device D
Permit Automatic Interrupt
Reset Bit K
Remove Beginning Item from List
Read Console Switches
Remove End Item from List
Reset TSTF if Bit K is Even
Reset TSTF
if
Af.O
Reset TSTF
if
Bit K is Odd
Reset TSTF
Set Bit K
Select Device D
Set TSTF
Set TST F if Bit K is Even
Subtract K from A
Shift Left Arithmetic
Shift Left Logical
Set TSTF
if
A is NON- ZERO
Set TSTF if Bit K is Odd
Save Place and Branch
Shift Right Arithmetic
Shift Right Circular
Shift Right Logical
Set Stall Alarm
Store A
Store Indirect
Set Trapping Mode Flip-flop
Store
Q
Store Index
Subtract
Test Even and Reset Bit K
Test Even and Set Bit K
Test Bit K Even
Test Not Minus One
Test Af.O
Test Bit K Add
Test Odd and Reset Bit K
.Test Odd and Set Bit K
Test and Shift Circular
Test Index High or Equal
Test Zero and Complement
Test A Zero
Execute
Table
1/0
EXECUTE TIME
4.8
3.2
7.3
8. 9 - 12. 1
4.7
4.8
* 60.8
***
8.5 & 26.5
3.2
***
8.5
&
26.5
2.2
4.7
*122.0
2.2
*136.0
4.7
4.7
4.7
4.7
4.7
***
8. 5
&
26. 5
4.7
4.7
*
6.4
4. 8 - 8. 0
4.8-8.0
4.7
4. '7
3.2
4.7
4.7
4.7
2.2
3.2
* 40.9
2.2
6.4
6.4
3.2
4.7
4.7
4.7
4.7
4.7
4.7
4.7
4.7
4.7
4.7
4.7
4.7
1. 6
*** 12. 7
&
30. 7
ADDRESSING
REL.
INDEX
OCTAL CODE
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
17x00000
07x*K
45004330
55x*Y
05013000
26200000
62x*Y
25x2D
21x*Y
25x4D
25020000
05x4500K
56x*Y
25050000
46x*Y
05x7040K
05004470
05x0440K
05004737
05x4600K
25x0D
05004637
05x7050K
50x0K
45x0204K
45x0200K
05004570
05x0450K
33x*Y
05x1404K
05x0404K
05x0004K
25010000
32x*Y
53x*Y
25000001
44x*Y
06x*Y
31x*Y
05x4560K
05x4660K
05x7070K
05070770
05004770
05x0470K
05x4570K
05x4670K
05x0464K
24x0 - K
05064670
05004670
04x*Y
*
=
Relative
Addressing
*
=
Extended function or "quasi" instructions. Index address
modification adds 1. 6 µs to stated execution times.
**
=
Not an instruction, a wired sequence.
***
=
Selected by K 3
=
7 for
high speed and K3 f. 7
for low speed.
Notes: Where two times are listed for one 1/0 instruction the smaller figure is for the high-speed I/O channel
of the GE/PAC 4020 computer.
Where two times are listed for floating point instructions, the first is for single word; the second, for
double word. K may range up to 3110 (five bits) on shifts and up to 409510 (14 bits) on constants. Where
K is greater than 7, add it (in octal) to the indicated code.
Example: TSC 138 would be 05x04653.
11
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