Epson S1C17624 Technical Manual page 181

Cmos 16-bit single chip microcontroller
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note: The correct counter value may not be read out (reading is unstable) if the register is read while
counting is underway. Read the counter register twice in succession and treat the value as valid if
the values read are identical.
Stopwatch Timer interrupt Mask Register (SWT_iMSK)
Register name address
Bit
Stopwatch
0x5022
D7–3 –
Timer interrupt
(8 bits)
D2
Mask Register
D1
(SWT_iMSK)
D0
This register enables or disables interrupt requests individually for the 100 Hz, 10 Hz, and 1 Hz signals. Setting
SIE* to 1 enables SWT interrupts for the corresponding frequency signal falling edge, while setting to 0 disables
interrupts.
D[7:3]
Reserved
D2
Sie1: 1 hz interrupt enable Bit
Enables or disables 1 Hz interrupts.
1 (R/W): Interrupt enabled
0 (R/W): Interrupt disabled (default)
D1
Sie10: 10 hz interrupt enable Bit
Enables or disables 10 Hz interrupts.
1 (R/W): Interrupt enabled
0 (R/W): Interrupt disabled (default)
D0
Sie100: 100 hz interrupt enable Bit
Enables or disables 100 Hz interrupts.
1 (R/W): Interrupt enabled
0 (R/W): Interrupt disabled (default)
Stopwatch Timer interrupt Flag Register (SWT_iFlG)
Register name address
Bit
0x5023
D7–3 –
Stopwatch
Timer interrupt
(8 bits)
D2
Flag Register
D1
(SWT_iFlG)
D0
This register indicates the occurrence state of interrupt causes due to 100 Hz, 10 Hz, and 1 Hz signals. If an SWT
interrupt occurs, identify the interrupt cause (frequency) by reading the interrupt flag in this register. SIF* is an
SWT module interrupt flag that is set to 1 at the falling edge of the corresponding 100 Hz, 10 Hz, or 1 Hz interrupt.
SIF* is reset by writing 1.
D[7:3]
Reserved
D2
SiF1: 1 hz interrupt Flag Bit
Indicates whether the cause of 1 Hz interrupt has occurred or not.
1 (R):
Cause of interrupt has occurred
0 (R):
No cause of interrupt has occurred (default)
1 (W):
Flag is reset
0 (W):
Ignored
D1
SiF10: 10 hz interrupt Flag Bit
Indicates whether the cause of 10 Hz interrupt has occurred or not.
1 (R):
Cause of interrupt has occurred
0 (R):
No cause of interrupt has occurred (default)
1 (W):
Flag is reset
0 (W):
Ignored
S1C17624/604/622/602/621 TeChniCal Manual
name
Function
reserved
Sie1
1 Hz interrupt enable
Sie10
10 Hz interrupt enable
Sie100
100 Hz interrupt enable
name
Function
reserved
SiF1
1 Hz interrupt flag
SiF10
10 Hz interrupt flag
SiF100
100 Hz interrupt flag
Seiko epson Corporation
16 STOPWaTCh TiMeR (SWT)
Setting
init. R/W
1 Enable
0 Disable
1 Enable
0 Disable
1 Enable
0 Disable
Setting
init. R/W
1 Cause of
0 Cause of
interrupt
interrupt not
occurred
occurred
Remarks
0 when being read.
0
R/W
0
R/W
0
R/W
Remarks
0 when being read.
0
R/W Reset by writing 1.
0
R/W
0
R/W
16-5

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