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Capture mode (CCaMD/CCBMD = 1)
The capture mode captures the counter value when an external event such as a key entry occurs (at the specified
edge of the external input signal). In this mode, the T16A_CCAx and/or T16A_CCBx registers function as the
capture A and/or capture B registers.
The table below lists the input pins of the external trigger signals used for capturing counter values. The pin
function of the corresponding ports must be switched for trigger input in advance. See the "I/O Ports (P)" chap-
ter for switching the pin function.
The trigger edge of the signal can be selected using the CAPATRG[1:0]/T16A_CCCTLx register for capture A
and CAPBTRG[1:0]/T16A_CCCTLx register for capture B.
When a specified trigger edge is input during counting, the current counter value is loaded to the capture regis-
ter. At the same time the capture A or capture B interrupt flag is set and the interrupt signal of the timer channel
is output to the ITC if the interrupt has been enabled. This interrupt can be used to read the captured data from
the T16A_CCAx or T16A_CCBx register. For example, external event cycles and pulse widths can be measured
from the difference between two captured counter values read.
If the captured data is overwritten by the next trigger when the capture A or capture B interrupt flag has already
been set, the overwrite interrupt flag will be set. This interrupt can be used to execute an overwrite error han-
dling. To avoid occurrence of unnecessary overwrite interrupt, the capture A or capture B interrupt flag must be
reset after the captured data has been read from the T16A_CCAx or T16A_CCBx register.
notes: • The correct captured data may not be obtained if the captured data is read at the same time
the next value is being captured. Read the capture register twice to check if the read data is
correct as necessary.
• To capture counter data properly, both the High and Low period of the CAPx trigger signal
must be longer than the source clock cycle time.
The setting of CAPATRG[1:0] or CAPBTRG[1:0] is ineffective in comparator mode. No counter capturing op-
eration will be performed even if a trigger edge is specified.
The capture mode cannot generate/output the TOUT signal as no compare signal is generated.
13.4.2
Repeat Mode and One-Shot Mode
Each counter features two count modes: repeat mode and one-shot mode. The count mode is selected using TRMD
/T16A_CTLx register.
Repeat mode (TRMD = 0, default)
Setting TRMD to 0 sets the corresponding counter to repeat mode.
In this mode, once the count starts, the counter continues running until stopped by the application program. The
counter continues the count even if the counter is reset to 0 or returns to 0 due to a counter overflow. The coun-
ter should be set to this mode to generate periodic interrupts at desired intervals or to generate a timer output
waveform.
S1C17624/604/622/602/621 TeChniCal Manual
Table 13.
4.1.1 List of Counter Capture Trigger Signal Input Pins
Channel
T16A2 Ch.0
T16A2 Ch.1
Table 13.
4.1.2 Capture Trigger Edge Selection
CaPaTRG[1:0]/ CaPBTRG[1:0]
0x3
0x2
0x1
0x0
Seiko epson Corporation
Trigger input pins
Capture a
Capture B
CAPA5
CAPB5
CAPA6
CAPB6
Trigger edge
Falling edge and rising edge
Falling edge
Rising edge
Not triggered
13 16-BiT PWM TiMeRS (T16a2)
(Default: 0x0)
13-5
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