Download Print this page

Sony APR-5000 Technical Service page 117

Advertisement

IC 1 A is an ACN
(
Active
Combining
Network ) buffer
amplifier
similar
to the circuit used
in audio consoles
.
This
provides
a weighted sum of all
signals
.
When
any
number of channel
signals are
selected via the ALN
panel
,
these
channels
combine with no increase of
signal
level
.
This
signal
is
ouput
to the
Audio
Signal
Board ( ASB ) located in the meter
bridge
housing where the
VU meter
provides
the
metering
for
the CAL SUM BUS
.
o
On board
regulation
is
provided by two 3
terminal Monolithic
type regulators
( IC 20
-
IC
21 )
.
The
input
to these regulators
is a
regulated +
/
-
18 volts
.
These
regulators are provided
to isolate the
MST Card from
digital
influence within
the
system
.
This
regulation
cicuit has the flexibility of
beipg
^
configured as
either
3
fixed regulator
cirpuit
,
or as a
variable
regulator
circuit (
refer to the schematic
diagram
i n
Section 7 of this
manual
)
.
5.2
.
3
Channel Card ( CNL ) Overview
The ChaNnel Card ( CNL )
incorporates
all of the audio
signal
record /
reproduce circuitry
and
performs
all audio
signal
processing
within its
respective
channel of the
APR
-
5000
audio
system
.
The CNL is
controlled
by
two data busses
,
the
Audio Data Bus ( ADTA
-
0
through
7 from the CPU board ) and the
Parameter Address Bus ( PA
-
1
through
9 from the MST Card )
.
The Audio Data Bus
provides
the CNL with all
keystroke
and
program
information that is sent
from the CPU
.
Control of
all CNL cards is
performed by
the MST card
.
The Master Card
converts the
Audio Address Bus ( AADR ) from the CPU into
the
Parameter Address Buss ( PA
-
0
through 9
)
.
The Audio Address
Buss is
an 8
bit buss that controls
a precoded set of
parameter
enables
,
channel enables
,
and drawer enables
.
The
pre
-
encoded
parameter
enables allow
latching
of selected data
to the
appropriate
latches on the CNL card
.
In addition
,
this data is also directed to the
Digitally
Controlled
Resistors ( DCR ) which are the
amplitude varing
devices within
the
alignment circuitry
.
O
n
5
-
8

Advertisement

loading