Temperature And Voltage Monitoring On The Board And Processor - Motorola CompactPCI CPN5365 Installation And Use Manual

Single board computer and cptm-01 transition module
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Temperature and Voltage Monitoring on the
Board and Processor
Two on-board devices (a Maxim MAX1617 temperature sensor and a
National LM81 system monitor) provide board and processor, temperature
and voltage monitoring. You can read data from and write data to these
devices over the System Management Bus (SMBus) through registers in
the PIIX4E South Bridge. For register programming information refer to
the PIIX4E data sheet listed in
The MAX1617 temperature sensor maps to SMBus address 1001110b. It
monitors the Pentium III CPU die temperature and the board temperature
at the bottom of the board adjacent to the CPU. The LM81 system monitor
maps to SMBus address 0101101b. It monitors the power supplies on the
board (+5V, +3.3V, +12V), the processor I/O voltage (+1.5V), the CPU
core voltage, and the board temperature at the top of the board.
Note
On both devices, an internal analog to digital converter (ADC) continually
measures voltages and/or voltage drops across diodes, and stores the
resulting data in internal registers. You can read this data via the SMBus.
You can also program the MAX1617 and LM81 through the SMBus
accessible registers to set high and low limits for each measured parameter,
and to generate an alarm output when these limits are exceeded. Alarm
outputs route to the Field Programmable Gate Array, where you can read
them from a status register or they can generate an interrupt. For
programming information about the MAX1617 temperature sensor and
LM81 system monitor, refer to
on page
http://www.motorola.com/computer/literature

Temperature and Voltage Monitoring on the Board and Processor

You cannot use the LM81 system monitor fan tachometer inputs
and chassis intrusion functions. There are no connections on the
CPN5365 to any of these inputs/outputs.
4-6, and
Appendix C, Related
Appendix C, Related
Documentation.
Field Programmable Gate Array Registers
Documentation.
4
4-11

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