Sony MCC-3000MT Service Manual page 155

DPR-340 (5/14)_L
IC300(4/7)
CXD9211CGG
AR10
DP_B_DDR_DM7
B_DDR_DM7
DP_B_DDR_DM6 AR12
B_DDR_DM6
AR5
DP_B_DDR_DM5
B_DDR_DM5
AR8
DP_B_DDR_DM4
B_DDR_DM4
AG1
DP_B_DDR_DM3
B_DDR_DM3
AD1
DP_B_DDR_DM2
B_DDR_DM2
AB1
DP_B_DDR_DM1
B_DDR_DM1
W1
DP_B_DDR_DM0
B_DDR_DM0
AR11
DP_B_DDR_DQS7
B_DDR_DQS7
DP_B_DDR_DQS6 AR13
B_DDR_DQS6
DP_B_DDR_DQS5 AR4
B_DDR_DQS5
AR7
DP_B_DDR_DQS4
B_DDR_DQS4
AH1
DP_B_DDR_DQS3
B_DDR_DQS3
AE1
DP_B_DDR_DQS2
B_DDR_DQS2
AA1
DP_B_DDR_DQS1
B_DDR_DQS1
DP_B_DDR_DQS0 V1
B_DDR_DQS0
AK3
DP_O_DDR_ADDR12
O_DDR_ADDR12
DP_O_DDR_ADDR11 AL2
O_DDR_ADDR11
DP_O_DDR_ADDR10 AJ3
O_DDR_ADDR10
DP_O_DDR_ADDR9 AL3
O_DDR_ADDR9
AM3
DP_O_DDR_ADDR8
O_DDR_ADDR8
AN1
DP_O_DDR_ADDR7
O_DDR_ADDR7
AN2
DP_O_DDR_ADDR6
O_DDR_ADDR6
DP_+2.5V
DP_O_DDR_ADDR5 AP1
O_DDR_ADDR5
FB500
DP_O_DDR_ADDR4 AN3
O_DDR_ADDR4
DP_O_DDR_ADDR3 AF3
O_DDR_ADDR3
AK2
DP_O_DDR_ADDR2
O_DDR_ADDR2
AF2
DP_O_DDR_ADDR1
X500 O_DDR_ADDR1
C500
54MHz
AH2
0.1uF DP_O_DDR_ADDR0
O_DDR_ADDR0
4
R508
VDD 10 AL20
1 3
OE OUT I_CLK_DDR
AR3
GND DP_O_DDR_CLK1
O_DDR_CLK1
2
AL1
DP_O_DDR_CLK0
O_DDR_CLK0
AG3
DP_O_DDR_BA0
O_DDR_BA0
GND
AE3
DP_O_DDR_BA1
O_DDR_BA1
AG2
DP_O_DDR_CAS
O_DDR_CAS
DP_O_DDR_CKE AM2
O_DDR_CKE
DP_O_DDR_CLKN1 AR2
O_DDR_CLKN1
AK1
DP_O_DDR_CLKN0
O_DDR_CLKN0
AJ2
DP_O_DDR_CS
O_DDR_CS
DP_O_DDR_RAS AE2
O_DDR_RAS
T-ONE
AH3
DP_O_DDR_WE
O_DDR_WE
M-DDR
DP_+1.8V FB501
C501
10uF AK18
VDDE18_33
C502 AK16
0.1uF
VDDE18_32
AK14
VDDE18_31
AK12
VDDE18_30
AK10
C503
VDDE18_29
0.1uF
AK8
VDDE18_28
AK6
VDDE18_27
AJ17
VDDE18_26
AJ15
C504
VDDE18_25
0.1uF
AJ11
VDDE18_24
AJ9
VDDE18_23
AJ7
VDDE18_22
AH6
C505
0.1uF VDDE18_21
AG7
VDDE18_20
AF6
VDDE18_19
AE7
VDDE18_18
AD6
C506
VDDE18_17
0.1uF
AB6
VDDE18_16
AA7
VDDE18_15
Y6
VDDE18_14
W7
C507
VDDE18_13
0.1uF
V6
VDDE18_12
U6
VDDE18_11
T7
VDDE18_10
R6
C508
0.1uF VDDE18_9
N6
VDDE18_8
M7
C509
VDDE18_7
0.1uF
GND
DP_+1.1V_TONE
FB502
C510 AJ18
10uF
VDDI12_22
AJ13
VDDI12_21
AJ10
C511
VDDI12_20
0.1uF
AH7
VDDI12_19
AC7
VDDI12_17
V7
VDDI12_15
P7
C512
VDDI12_14
0.1uF
GND
DPR-340_5
MCC-3000MT
AL14
DP_B_DDR_DATA63 DP_+1.8V
B_DDR_DATA63
AL13 DP_B_DDR_DATA62
B_DDR_DATA62
AL12
DP_B_DDR_DATA61
B_DDR_DATA61
AL11
DP_B_DDR_DATA60
B_DDR_DATA60 FB503
AL10
DP_B_DDR_DATA59
B_DDR_DATA59
AL9
DP_B_DDR_DATA58
B_DDR_DATA58
AL8
DP_B_DDR_DATA57
B_DDR_DATA57
AL7 DP_B_DDR_DATA56 DP_O_DDR_BA1
B_DDR_DATA56
AN11
DP_B_DDR_DATA55 DP_O_DDR_BA0
B_DDR_DATA55
AP11
DP_B_DDR_DATA54 DP_O_DDR_ADDR12
B_DDR_DATA54
AN12
DP_B_DDR_DATA53 DP_O_DDR_ADDR11
B_DDR_DATA53
AP12
DP_B_DDR_DATA52 DP_O_DDR_ADDR10
B_DDR_DATA52
AN13 DP_B_DDR_DATA51 DP_O_DDR_ADDR9
B_DDR_DATA51
AP13
DP_B_DDR_DATA50 DP_O_DDR_ADDR8
B_DDR_DATA50
AN14
DP_B_DDR_DATA49 DP_O_DDR_ADDR7
B_DDR_DATA49
AP14
DP_B_DDR_DATA48 DP_O_DDR_ADDR6
B_DDR_DATA48
AP2
DP_B_DDR_DATA47 DP_O_DDR_ADDR5
B_DDR_DATA47
AP3
DP_B_DDR_DATA46 DP_O_DDR_ADDR4
B_DDR_DATA46
AN4 DP_B_DDR_DATA45 DP_O_DDR_ADDR3
B_DDR_DATA45
AP4
DP_B_DDR_DATA44 DP_O_DDR_ADDR2
B_DDR_DATA44
AN5
DP_B_DDR_DATA43 DP_O_DDR_ADDR1
B_DDR_DATA43
AP5
DP_B_DDR_DATA42 DP_O_DDR_ADDR0
B_DDR_DATA42
AN6
DP_B_DDR_DATA41
B_DDR_DATA41
AP6
DP_B_DDR_DATA40 DP_O_DDR_CS
B_DDR_DATA40
AP10 DP_B_DDR_DATA39 DP_O_DDR_WE
B_DDR_DATA39
AN10
DP_B_DDR_DATA38 DP_O_DDR_CAS
B_DDR_DATA38
AP9
DP_B_DDR_DATA37 DP_O_DDR_RAS
B_DDR_DATA37
AN9
DP_B_DDR_DATA36 DP_B_DDR_DM7
B_DDR_DATA36
AP8
DP_B_DDR_DATA35 DP_B_DDR_DM6
B_DDR_DATA35
AN8
DP_B_DDR_DATA34 DP_B_DDR_DM5
B_DDR_DATA34
AP7 DP_B_DDR_DATA33 DP_B_DDR_DM4
B_DDR_DATA33
AN7
DP_B_DDR_DATA32 DP_B_DDR_DQS7
B_DDR_DATA32
AL6
DP_B_DDR_DATA31 DP_B_DDR_DQS6
B_DDR_DATA31
AL5
DP_B_DDR_DATA30 DP_B_DDR_DQS5
B_DDR_DATA30
AK5
DP_B_DDR_DATA29 DP_B_DDR_DQS4
B_DDR_DATA29
AJ5
DP_B_DDR_DATA28 DP_O_DDR_CKE
B_DDR_DATA28
AH5 DP_B_DDR_DATA27 DP_O_DDR_CLK1
B_DDR_DATA27
AG5
DP_B_DDR_DATA26 DP_O_DDR_CLKN1
B_DDR_DATA26
AF5
DP_B_DDR_DATA25
B_DDR_DATA25
AE5
DP_B_DDR_DATA24
B_DDR_DATA24
AA2
DP_B_DDR_DATA23
B_DDR_DATA23
AA3
DP_B_DDR_DATA22
B_DDR_DATA22
AB2 DP_B_DDR_DATA21
B_DDR_DATA21
AB3
DP_B_DDR_DATA20
B_DDR_DATA20
AC2
DP_B_DDR_DATA19
B_DDR_DATA19
AC3
DP_B_DDR_DATA18
B_DDR_DATA18
AD2
DP_B_DDR_DATA17
B_DDR_DATA17
AD3 DP_B_DDR_DATA16
B_DDR_DATA16
U5
DP_B_DDR_DATA15
B_DDR_DATA15
V5
DP_B_DDR_DATA14
B_DDR_DATA14
W5
DP_B_DDR_DATA13
B_DDR_DATA13
Y5
DP_B_DDR_DATA12
B_DDR_DATA12
AA5
DP_B_DDR_DATA11
B_DDR_DATA11
AB5 DP_B_DDR_DATA10
B_DDR_DATA10
AC5
DP_B_DDR_DATA9
DP_+1.8V
B_DDR_DATA9
AD5
DP_B_DDR_DATA8
B_DDR_DATA8
Y3
DP_B_DDR_DATA7
B_DDR_DATA7
Y2
DP_B_DDR_DATA6
B_DDR_DATA6 FB504
W3
DP_B_DDR_DATA5
B_DDR_DATA5
W2 DP_B_DDR_DATA4
B_DDR_DATA4
V3
DP_B_DDR_DATA3
B_DDR_DATA3
V2
DP_B_DDR_DATA2 DP_O_DDR_BA1
B_DDR_DATA2
U3
DP_B_DDR_DATA1 DP_O_DDR_BA0
B_DDR_DATA1
U2
DP_B_DDR_DATA0 DP_O_DDR_ADDR12
B_DDR_DATA0
DP_O_DDR_ADDR11
M6 DP_O_DDR_ADDR10
VSS35
N7
DP_O_DDR_ADDR9
VSS37
P6
DP_O_DDR_ADDR8
VSS39
R7
DP_O_DDR_ADDR7
VSS41
T1
DP_O_DDR_ADDR6
VSS42
T6
DP_O_DDR_ADDR5
VSS43
U1 DP_O_DDR_ADDR4
VSS45
U7
DP_O_DDR_ADDR3
VSS46
W6
DP_O_DDR_ADDR2
VSS48
Y1
DP_O_DDR_ADDR1
VSS50
Y7
DP_O_DDR_ADDR0
VSS51
AA6
VSS53
AB7 DP_O_DDR_CS
VSS54
AC1
DP_O_DDR_WE
VSS55
AC6
DP_O_DDR_CAS
VSS56
AD7
DP_O_DDR_RAS
VSS57
AE6
DP_B_DDR_DM3
VSS59
AF1
DP_B_DDR_DM2
VSS61
AF7
DP_B_DDR_DM1
VSS62
AG6
DP_B_DDR_DM0
VSS64
AJ1
DP_B_DDR_DQS3
VSS67
AJ6
DP_B_DDR_DQS2
VSS68
AJ8
DP_B_DDR_DQS1
VSS69
AJ12 DP_B_DDR_DQS0
VSS70
AJ14
DP_O_DDR_CKE
VSS71
AJ16
DP_O_DDR_CLK0
VSS72
AK7
DP_O_DDR_CLKN0
VSS79
AK9
VSS80
AK11
VSS81
AK13
VSS82
AK15
VSS83
AK17
VSS84
AK19
VSS85
AM1
VSS92
AR1
VSS94
AR6
VSS95
AR9
VSS96
AR14
VSS97
GND
C515 C519 C523
0.1uF
0.1uF 0.1uF
C513 C517 C521 C525
0.1uF
22uF 0.1uF 0.1uF
C527
GND 0.1uF
H9 A2 DP_B_DDR_DATA63
BA1 DQ31
H8 B3
DP_B_DDR_DATA62
BA0 DQ30
H3 B2
DP_B_DDR_DATA61
A12 DQ29
H2 C3
DP_B_DDR_DATA60
A11 DQ28
J7 C2
DP_B_DDR_DATA59
A10 DQ27
H1 D3 DP_B_DDR_DATA58
A9 DQ26
J3 D2
DP_B_DDR_DATA57
A8 DQ25
J2 E3
DP_B_DDR_DATA56
A7 DQ24
J1 E7
DP_B_DDR_DATA55
A6 DQ23
K3 D8
DP_B_DDR_DATA54
A5 DQ22
K1 D7
DP_B_DDR_DATA53
A4 DQ21
K9 C8 DP_B_DDR_DATA52
A3 IC500 DQ20
K7 C7
H5MS5122EFR-J3M DP_B_DDR_DATA51
A2 DQ19
J9 B8
T-ONE DP_B_DDR_DATA50
A1 DQ18
J8 B7
DP_B_DDR_DATA49
A0 DQ17
M_DDR_1
A8
DP_B_DDR_DATA48
DQ16
H7 R2
DP_B_DDR_DATA47
CS DQ15
G7 P3 DP_B_DDR_DATA46
WE DQ14
G8 P2
DP_B_DDR_DATA45
CAS DQ13
G9 N3
DP_B_DDR_DATA44
RAS DQ12
F2 N2
DP_B_DDR_DATA43
DM3 DQ11
F8 M3
DP_B_DDR_DATA42
DM2 DQ10
K2 M2
DP_B_DDR_DATA41
DM1 DQ9
K8 L3 DP_B_DDR_DATA40
DM0 DQ8
E2 L7
DP_B_DDR_DATA39
DQS3 DQ7
E8 M8
DP_B_DDR_DATA38
DQS2 DQ6
L2 M7
DP_B_DDR_DATA37
DQS1 DQ5
L8 N8
DP_B_DDR_DATA36
DQS0 DQ4
G1 N7
DP_B_DDR_DATA35
CKE DQ3
G2 P8 DP_B_DDR_DATA34
CK DQ2
G3 P7
DP_B_DDR_DATA33
CK DQ1
R8
DP_B_DDR_DATA32
DQ0
F3
NC1
F7
NC2
GND
C520
C516 C524
0.1uF 0.1uF
0.1uF
C514 C518 C522 C526
22uF 0.1uF 0.1uF 0.1uF
C528
0.1uF
GND
H9 A2
DP_B_DDR_DATA31
BA1 DQ31
H8 B3
DP_B_DDR_DATA30
BA0 DQ30
H3 B2
DP_B_DDR_DATA29
A12 DQ29
H2 C3
DP_B_DDR_DATA28
A11 DQ28
J7 C2 DP_B_DDR_DATA27
A10 DQ27
H1 D3
DP_B_DDR_DATA26
A9 DQ26
J3 D2
DP_B_DDR_DATA25
A8 DQ25
J2 E3
DP_B_DDR_DATA24
A7 DQ24
J1 E7
DP_B_DDR_DATA23
A6 DQ23
K3 D8
DP_B_DDR_DATA22
A5 DQ22
K1 D7 DP_B_DDR_DATA21
A4 DQ21
K9 C8
DP_B_DDR_DATA20
IC501
A3 DQ20
K7 H5MS5122EFR-J3M C7
DP_B_DDR_DATA19
A2 DQ19
J9 B8
T-ONE DP_B_DDR_DATA18
A1 DQ18
J8 B7
DP_B_DDR_DATA17
A0 DQ17
M_DDR_0
A8
DP_B_DDR_DATA16
DQ16
H7 R2 DP_B_DDR_DATA15
CS DQ15
G7 P3
DP_B_DDR_DATA14
WE DQ14
G8 P2
DP_B_DDR_DATA13
CAS DQ13
G9 N3
DP_B_DDR_DATA12
RAS DQ12
F2 N2
DP_B_DDR_DATA11
DM3 DQ11
F8 M3
DP_B_DDR_DATA10
DM2 DQ10
K2 M2
DP_B_DDR_DATA9
DM1 DQ9
K8 L3
DP_B_DDR_DATA8
DM0 DQ8
E2 L7
DP_B_DDR_DATA7
DQS3 DQ7
E8 M8
DP_B_DDR_DATA6
DQS2 DQ6
L2 M7
DP_B_DDR_DATA5
DQS1 DQ5
L8 N8 DP_B_DDR_DATA4
DQS0 DQ4
G1 N7
DP_B_DDR_DATA3
CKE DQ3
G2 P8
DP_B_DDR_DATA2
CK DQ2
G3 P7
DP_B_DDR_DATA1
CK DQ1
R8
DP_B_DDR_DATA0
DQ0
F3
NC1
F7
NC2
GND
7-35