Sony HKC-7080 Installation And Maintenance Manual page 59

SC7S04F (MOTOROLA)
TC7S04F(TE85R)
TC7S04FU(TE85R) (TOSHIBA)
TC7SH04FU (TOSHIBA)
TC7SH04FU-TE85R
C-MOS INVERTER
—TOP VIEW—
2 4
1
5 V
DD A Y = A
2
A
Y =
GND 3 4
A Y
0 1
0 : LOW LEVEL
1 0
1 : HIGH LEVEL
SN74HC138APW-E05 (TI)
C-MOS 3-TO-8 LINE DECODER/DEMULTIPLEXER
—TOP VIEW—
A IN 1 V 16
DD
Y0
B 2 15
IN OUT
Y1
C 3 14
IN
OUT
EN1
Y2
IN 4 13
OUT
EN2
Y3
5 12
IN OUT
Y4
EN3 6 11
IN
OUT
Y7 Y5
OUT 7 10
OUT
Y6
8 GND 9
OUT
SN74HC164APW-E05 (TI)
C-MOS 8-BIT SERIAL-IN/PARALLEL-OUT SHIFT REGISTER
—TOP VIEW—
V
A 1 DD 14
1
A
B 2 13 Q8
D
2
B
Q1 3 12 Q7
8
Q2 4 11 Q6
Q3 5 10 Q5
Q4 6 9 R
D
INPUTS
7 8 CK
GND R CK A
D
0 x x
1 0 x
1 1
1 0
1 x
Q1 Q2 Q3 Q4
3 4 5 6
8
CK
1
A
2
D Q D Q D Q D Q
B
R R R R
D D D D
9
RD
HKC-7080
Y
1 15
A Y0
2 14
B Y1
3 13
C Y2
12
Y3
11
Y4
4
EN1 10
Y5
5
9
EN2
EN
Y6
6 7
EN3 Y7
INPUTS OUTPUTS
EN C B A Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0
0 x x x 1 1 1 1 1 1 1 1
1 0 0 0 1 1 1 1 1 1 1 0
1 0 0 1 1 1 1 1 1 1 0 1
1 0 1 0 1 1 1 1 1 0 1 1
1 0 1 1 1 1 1 1 0 1 1 1
1 1 0 0 1 1 1 0 1 1 1 1
1 1 0 1 1 1 0 1 1 1 1 1
1 1 1 0 1 0 1 1 1 1 1 1
1 1 1 1 0 1 1 1 1 1 1 1
EN1 EN2
EN = • • EN3 0 : LOW LEVEL
1 : HIGH LEVEL
x : DON'T CARE
3
Q1
4
Q2
5
Q3
6
Q4
10
Q5
11
Q6
12
Q7
13
Q8
R
D
9
OUTPUTS
B Q1 Q2 Q8
x 0 0 0 0
x Q1o Q2o Q8o
1 1 Q1n Q7n
0 : LOW LEVEL
x 0 Q1n Q7n
1 : HIGH LEVEL
0 0 Q1n Q7n
x : DON'T CARE
Q5 Q6 Q7 Q8
10 11 12 13
D Q D Q D Q D Q
R R R R
D D D D
SN74HC32APW-E05 (TI)
C-MOS QUAD 2-INPUT OR GATES
—TOP VIEW—
14 13 12 11 10 9 8
A
V
DD
B
Y = A + B = A • B
GND
1 2 3 4 5 6 7
0 : LOW LEVEL
1 : HIGH LEVEL
TC74HC4053AFT(EL) (TOSHIBA)
C-MOS TRIPLE 2-CHANNEL ANALOG MULTIPLEXER/DEMULTIPLEXER
—TOP VIEW—
12 X0
Y1 1 V 16
I/O DD
13
X1
OPEN
11 A
Y0 2 15 Y
I/O I/O
2 Y0
Z1 3 14 X
I/O I/O
1 Y1
OPEN
10 B
Z 4 13 X1
I/O I/O
5
Z0
Z0 5 12 X0
I/O I/O
3
Z1
OPEN
9 C
EN
6 11 A
IN IN
7 10 B
V IN
EE
8 GND 9 C
IN
CONTROL INPUTS
SELECT ON CHANNEL
EN
C B A
0 0 0 0 Z0 Y0 X0
0 0 0 1 Z0 Y0 X1
0 0 1 0 Z0 Y1 X0
0 0 1 1 Z0 Y1 X1
0 1 0 0 Z1 Y0 X0
0 1 0 1 Z1 Y0 X1
0 1 1 0 Z1 Y1 X0
0 : LOW LEVEL
0 1 1 1 Z1 Y1 X1
1 : HIGH LEVEL
1 x x x OPEN
x
: DON'T CARE
TC7S00FU(TE85R) (TOSHIBA)
TC7SH00FU-TE85R (TOSHIBA)
C-MOS 2-INPUT NAND GATE
—TOP VIEW—
2
1 5 V
DD A A
4
Y =
1
B
B
2
A B
GND 3 4
+
Y = A • B =
A B Y
0 0 1
0 1 1
1 0 1
0 : LOW LEVEL
1 1 0
1 : HIGH LEVEL
TC7S08FU(TE85R) (TOSHIBA)
TC7SH08FU-TE85R (TOSHIBA)
C-MOS 2-INPUT AND GATE
—TOP VIEW—
2
A
4
1 A
5 V
DD
1 Y =
B
B
2
Y = A • B = A + B
GND 3 4
A B Y
0 0 0
0 1 0
1 0 0
0 : LOW LEVEL
1 1 1
1 : HIGH LEVEL
A
Y = Y
B
A B Y
0 0 0
0 1 1
1 0 1
1 1 1
14
X
Y 15
4
Z
EN V
EE
6 7
Y
Y
5-9
IC