Toshiba TLCS-90 Series Data Book page 163

TOSHIBA
TMP 804 9PI -6,
T~.P
8039PI-6
Figure 6 illustrates the tlmlng of accessing the external data memory
during execution of external program.
(3) Interface with I/O Expander (TMP8243P)
The TMP8049 I/O can be easily expanded using the TMP8243 I/O Expander.
THis device uses onlY the lower half 4-bits of Port 2 for commuication
with the TMP8049.
Th~
TMP8243 contains four 4-bit I/O ports which serve
as extensions of one chip I/O and are addressed as Ports (4-7). All
communication takes place over the lower half of port 2 (P20 - P23) with
timing provided by an output pulse on the PROG pin. Each transfer consists
of two 4-bit nibbles the first containing the "OP Code" and port
address and the second containing the actual 4-bits of data.
+12V~
________________________________________________________ __
oJ
EA
::ET
0\_7
------/-i' : f-/ __ ~
DBO - DB7
PlO, P21
Input of Internal
RO~:
Address
Output
0
f Internal
Rm~
Data
Input of Internal
RON
Address
Input of Internal
RO~~ Address
Input of Internal
ROH
Address
Fig.7 Timing of Reading Internal Program Memory
5V
5V
10K
5S
R~
S
5V
D
SS
Q
F-.1
74
T
Q
R
ALE
Fig.S
(a)
Single Step Circuit
MCU48-153