Toshiba TLCS-90 Series Data Book page 149

TOSHIBA
TMP8049PI-6,T~~8039PI-6
PIN NAMES AND PIN DESCRIPTION
VSS (Power Supply)
Circuit GND potential
VDD (Power Supply)
+5V during operation Low power standby pin for TMP8049 RAM
VCC O·1ain PoV.'er Supply)
+SV during operation
PROG(Output)
Outpu t st robe for the TMP 8243P I/O expander
PIO-PI7 (Input/Output) Port 1
8-bit quasi -bidirectional port (Internal Pullup=50kn).
P20-P27 (Input/Output) Port 2
8-bit quasi-bidirectional port (Internal Pullup=50kn).
P20-P23 Contain the four high order program counter bits during an
external program memory fetch and serve as a 4-bit I/O expander bus for
the TM? 8243P :
DBO-DB7 (Input/Output,
3
State)
True bidirectional port which can be written or read synchronously using
the
RD, ~~
strobes. The port can also be statically latched. Contains
the 8 lo~ order program counter bits during an external progr~~ mem~
fetch, and receives the addressed instruction under the control of PSEN.
Also contains the address and data during an external
~~
data store
instruction, under control of ALE,
RD,
and WR.
TO (Input/Output)
Input pin testable using the conditional transfer instructions JTO and
JNTO. TO can be designated as a clock output using ENTO CLK instruction.
Tl (Input)
Input pin testable using the JTl and JNTI instruction. Can be designated
the event counter input using the timer/STRT CN! instruction.
INT (Input)
External interrupt input. Initiates an interrupt if interrupt is.
enabled. Interrupt is disabled after a reset. Also testable with
conditional jump instruction. (Active Low)
RD
(Output)
Output strobe activated during a Bus read. Can be used to enable data
onto the Bus from an external device. Used as a Read Strobe to External
Data Memory (Active Low).
WR (Output)
Output strobe during a Bus write (Active Low) Used as a Write Strobe to
External Data Memory.
MCU48-l39