100Mbit/S Receive Circuits; Receiver Buffer - Samsung KS8910 User Manual

Preliminary Spec. ver
1.4
KS8910 100/10 Mbps ETHERNET TRANSCEIVER
Figure 6-4. Transmit Twister-Pair Driver and Transmit Transformer
Voltage Reference
An on-chip band-gap reference calibrates the output voltage swing. This reference generates an on-chip voltage
voltage reference with an error of ±2.5%. The twisted-pair output voltage swing is proportional to the band-gap
voltage times the impedance matching resistance divided by the current reference resistance. The overall accuracy
of this output swing must be ± 5%.
Current Reference
An on-chip current reference circuit generates the transmit current from the band-gap reference and the external
current reference resistor, RRef. This reference resistor should be connected between ground and the RB pin. The
transmit output current is given by 25Kohm.

100MBIT/S RECEIVE CIRCUITS

The receive circuits include a receive buffer, an adaptive equalizer, a baseline restore circuit, and clock recovery.
The outputs of the analog receive block are data on 100RXD and a recovered clock on 100RXClk. The presence of
a receive signal is signaled as RX Signal Detect. The clock recovery lock detect is signaled on RXClk Lock.

RECEIVER BUFFER

A receive buffer is used to isolate the internal circuits from common mode noise that remains at the transformer
output. The common mode rejection ratio of the receive buffer is at least 40 dB at DC and 20dB at 100 MHz.
The input voltage at the input should be ±400mV differential. The receive buffer automatically generates its
common mode input reference. This allows operation with AC coupled signals. A voltage division and transmission
line termination is performed by the circuit shown in Figure 6-5.
TPOB
TPOP
200Ω
±1%
TPON
Chip
2
CT
1 CT
0.1uF
75Ω
±1%
0.1uF
Board
100BASE-TX ANALOG BLOCKS
Cable
6-5