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PRODUCT OVERVIEW
FEATURES
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Support for old and new media : Compatible with existing 10-Mbit/s networks.
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10BASE-T/100-BASE-TX operation : Range of price/performance points, Phased Conversion
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Full IEEE 802.3 compatibility : Compatible with existing hardware and software.
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Standard CSMA/CD,Full duplex capability at 10 and 100 Mbit/s : Increase in data throughput performance.
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Power management : Reduces power dissipation
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CMOS process with Single 3.3 volt operating supply : Compatible with standard system power supplies.
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On-chip filtering : Providing integrated lower cost solution
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Manual or automatic negotiation of port configuration : Provides ease of use in a mixed 10/100 Mbit/s network
configuration
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MII compliant interface : Can be used with many 100Base-TX MACs.
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Built-in transmit and receive filtering for 10BASE-T and 100BASE-TX
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Built-in LED drivers
ETHERNET SYSTEM BLOCK DIAGRAM
The complete Ethernet subsystem shown in Figure 1-2 is divided into three sections:
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The system bus interface and Direct Memory Access (DMA) engine
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The Media Access Control (MAC) layer
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The Physical or Medium Dependent Interface (MDI) layer
The PCI bus interface section contains transmit and receive data buffering, DMA control buffering, and a register
access module buffering.
The MAC layer consists of transmit and receive blocks, a Content Addressable Memory (CAM) for address
recognition, along with control, status, and error counter registers.
This representative PCI-based 100/10-Mbit/s Ethernet controller supports the Media Independent Interface (MII).
The MII is a standard for a media-independent layer which separates physical-layer issues from the MAC layer.
The MII is part of the ISO approved IEEE 802.3 100-Base-T standard for 100 Mbit/s Ethernet.
This specification describes a single chip which implements a Physical or MDI layer capable of accepting 100/10
Mbit/s Ethernet signals that provides a Media Independent Interface (MII) for connectivity to the MAC layer. It is
intended as an interface specification and an architectural overview of the device and its operation.
1-2
KS8910 100/10 Mbps ETHERNET TRANSCEIVER
Preliminary Spec. ver
1.4
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