Fpga Registers; Register Names And Offsets - GE SBC330 3U VPX Hardware Reference Manual

6 • FPGA Registers

6.1 Register Names and Offsets

46 SBC330 3U VPX Single Board Computer
All registers are set up at 4‐Byte offsets to allow for 32‐bit registers, but most
registers are 16 bits or less. Unused bits in the registers are signaled as 0 from the
FPGA. The registers are defined as being little endian for ease of interpretation
using the emulator.
NOTE
In the default shipped VxWorks, FPGA registers begin at 0xFC00 0000.
Table 6-1 Register Offsets
Offset Register Name
0x 0000 Interrupt
0x 0004 Interrupt Mask
0x 0008 Interrupt Edge/Level
0x 000C Board Revision
0x 0010 BIT and User LEDs
0x 0014 BMM Control
Blank address for expansion
0x 001C Geographic Address
0x 0020 Platform Multiplier
0x 0024 Core Multiplier
0x 0028 Miscellaneous Functions
0x 002C Axis Timer 1
0x 0030 Axis Timer 2
0x 0034 Axis Timer 3
0x 0038 Axis Timer Control
0x 003C Backplane Status
0x 0040 Backplane Command
0x 0044 Flash Control
0x 0048 Flash Password 1
0x 004C Flash Password 2
0x 0050 Flash Size
0x 0054 GPIO Input
0x 0058 GPIO Invert
0x 005C GPIO Direction
0x 0060 GPIO Output
0x 0064 Scratch 1
0x 0068 Scratch 2
0x 006C ID
Type FPGA Rel 3 FPGA Rel 4
Read/write 
Read/write

Read only

Read/write 
Read/write

Read/write NA
Read/write 
Read/write

Read/write 
Read only 
Read only

Read only 
Read only 
Read/write

Read only

Read/write 
Read/write

Read/write

Read only 
Read only

Read/write

Read/write 
Read/write

Read/write

Read/write 
Read/write

Read/write

Publication No. SBC330-0HH/3
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