Multiple Cpu Synchronous Interrupt - Mitsubishi Electric MELSEC Q Series User Manual

4.4 Multiple CPU Synchronous Interrupt

The multiple CPU synchronous interrupt function executes interrupt programs (multiple CPU synchronous interrupt
programs) at the timing of multiple CPU high speed transmission cycle.
The multiple CPU synchronous interrupt enables synchronization with multiple CPU high speed transmission cycle
and communications among CPU modules.
Also, since the multiple CPU high speed cycle is synchronized with the Motion CPU operation cycle, using the multiple
CPU high speed transmission function allows faster responses to requests from the Motion CPU and sequence pro-
gram execution synchronized with the operation cycle.
(1) Multiple CPU synchronous interrupt programs
Multiple CPU synchronous interrupt programs are programs using interrupt pointer I45.
(A program from an interrupt pointer (I45) to the IRET instruction corresponds to a multiple CPU synchronous
interrupt program.)
To execute multiple CPU synchronous interrupt programs, set interrupt permitted status with the EI instruction.
(2) Execution timing
Multiple CPU synchronous interrupt programs are executed at the timing of multiple CPU high speed transmis-
sion cycle.
Multiple CPU high speed
transmission
Sequence program
Multiple CPU synchronous
interrupt program
Figure 4.49 Execution timing of multiple CPU synchronous interrupt program
The multiple CPU synchronous interrupt is available when the following CPU
modules are used.
• Universal model QCPU (except Q00UCPU, Q01UCPU, Q02UCPU )
• Motion CPU (Q172DCPU, Q173DCPU )
4 - 53
0.88ms
Interrupt request
END 0
I45 IRET
Multiple CPU high speed transmission cycle
END 0
I45 IRET I45 IRET I45 IRET
END 0
I45 IRET