Speed Control; Motor Current Regulation - HP 7925D Service Manual

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the spindle motor housing so that the light from each LED
passes through the slotted area of the encoder disc and
strikes the associated phototransistor. When light strikes
the phototransistor, it conducts and the resultant output is
amplified and inverted. The LED/phototransistor pairs
are physically mounted on the PCA 30 degrees apart with
phase A arranged to conduct before phase B, therefore, the
output from phase A will lead that from phase B by 30
degrees.
The two signals from encoder peA-A10 are routed to spin-
dle logic PCA-A8 where they are conditioned and in-
verted. They can be observed at the test points labeled
"ENCA" and "ENCB". They are then coupled to the input
of the encoder pulse generator and two "exclusive-OR"
gates which act as programmable inverters. The encoder
pulse generator produces a pulse for each edge of both
spindle encoder sensors. Twelve encoder pulses are pro-
duced per revolution. The frequency of the encoder pulses
at 2700 revolutions per minute is 540 Hz. The output from
the encoder pulse generator can be observed at the test
point labeled "ENCP". The "exclusive-OR's" invert the
encoder signals when the stop spindle command is active
(RS
=
1) to dynamically brake the motor.
When the run spindle command is active (RS
=
0), no
inversion takes place and the encoder signals are clocked
into the phase A and phase B flip-flops by the output from
the encoder pulse generator. The latched encoder signals
are then routed to the phase decoder network where they
are decoded to select the proper current switch. These
phase selection outputs can be observed at test points
labeled "PH1+", "PH1-", "PH2+", and "PH2-".
Figure 1-9 illustrates the timing relationship of the two
input phase signals, the output from the encoder pulse
generator, and the four resultant phase selection output
signals.
If an overcurrent condition is detected in a given phase,
that phase will be inhibited. Similarly, if an overvoltage
condition is sensed, power to that phase will momentarily
be interrupted. Both motor phases will be inhibited when
the stop spindle command is active (RS
=
1) and the speed
is detected to be down or at the moment the reverse direc-
tion detector first detects that motor has begun to rotate
clockwise (reverse).
The latched encoder signals are also applied to the reverse
direction detector which is used to detect a clockwise rota-
tion of the motor during speed down detection. In addition,
a 180 Hz signal is derived from the latched encoder sig-
nals. This signal is used to clock the timeout counter
during a seek, seek home, or normal head load or unload
operation.
1-30. SPEED CONTROL. As previously men-
tioned, motor speed is derived from the phase encoder
information. The two signals from encoder PCA-A10 are
conditioned, inverted, and applied to the input of the en-
coder pulse generator. The encoder pulse generator pro-
duces a pulse for every edge of the encoder signals. Twelve
Theory of Operation
encoder pulses are produced per revolution. The frequency
of the encoder pulses at 2700 revolutions per minute is
540 Hz. The output from the encoder pulse generator can
be observed at the test point labled "ENCP". This output is
routed to the phase and speed down detectors.
The phase detector is a 3-stage shift register. The output
from the encoder pulse generator is used to shift "O's" to
the right and the output from a 540 Hz reference clock is
used to shift "l's" to the left. The 540 Hz reference clock is
derived from a 2.25 MHz crystal-controlled oscillator and
a divide-by-4168 counter. The output from the 2.25 MHz
oscillator can be observed at the test point labeled
"XTAL" and the output from the 540 Hz reference clock
can be observed at the test point labeled "720 Hz". Phase
detection is achieved by monitoring the center bit of the
shift register. This bit can be observed at the test point
labeled "PHASE".
When the disc pack is rotating slower than 2700 rpm, "l's"
will be shifted through the shift register because reference
clock pulses will occur more frequently than encoder
pulses. This will cause a "1" to remain in the center bit of
the shift register and maximum spindle current to be
commanded. As a result, the motor will begin to acceler-
ate. As the motor comes up to speed, encoder pulses will
begin to shift "O's" into the left-most bit. Eventually, this
will force the "1" out of the center bit. When this occurs, a
decrease in the center bit duty cycle will result which in
turn will decrease the spindle current command causing
less current to be delivered to the motor. At speed, the
center bit will toggle and the duty cycle will be nearly
symmetrical.
The left- and right-most bits of the shift register are moni-
tored by the speed up detector. When these bits remain
unchanged for approximately one-half a second, the motor
is declared to be at speed. The green SPD LED at the
output of the speed up detector will remain off until the
spindle is declared to be at speed.
If the spindle begins to loose speed slightly, the encoder
pulse that was supposed to shift the "I" out of the center
bit will be late. This will cause an increase in the center
bit duty cycle, an increase in the spindle current com-
mand, and more current to be delivered to the motor until
it returns to speed.
The output from the center bit of the shift register is
buffered and filtered to produce a smooth dc voltage which
represents the spindle current command.
The current command limiter reduces the spindle current
command during the braking operation. The spindle cur-
rent command is applied to the input of the current regu-
lation circuit. It can be observed at the test point labeled
"SCC".
1-31. MOTOR CURRENT REGULATION. The
motor current regulation circuitry compares the smooth dc
voltage representing the spindle current command with
1-13