Self-Test Function Test Description - HP 7925D Service Manual

Appendix A
TEST
NO.
17
16
15
14
13
12
A-42
TEST
Microprocessor
alive
RALU, Flags
PHI
FIFO's
PHI/FIFO
handshake
Formatter/
Separator
Loopback Test
7925
Table
A-S.
Self-Test Function Test Description
DESCRIPTION
This is the first test executed. It tests the heart of the microprocessor - the se-
quencers and the branching logic. Some ALU faults are also trapped by test 17. If a
fault is detected in test 17, the controller hangs up in a JMP* loop. The only way
to exit this loop is to either cycle the POWER switch or the disc drive RUN/STOP
switch. This action resets the microprocessor and causes it to start self test over.
There are no distinct sections within this test. On error, the TEST RESULT LED's
display an octal 17 both in the OP (operating) and SERVICE positions of the
OP/SERVICE switch.
This test checks the 2901 registers and arithmetic/logic units (RALU's), and the
program status register flags. Like test 17, if a failure is detected in test 16, the
controller hangs. Unlike test 17, the "hang" loop can be exited by activating the
START switch. On error, the TEST RESULT LED's display an octal 16 continu-
ously whether in the OP or SERVICE mode (unless the START switch is held in
the on position).
This test checks the PHI in its offline mode. The following items are tested:
• PHI identity sequence
• PHI interrupt flags
• Inbound and outbound FIFO data test
• Data tag bits (EOI and ATN)
On error, test 15 outputs an octal 15 on the TEST RESULT LED's and hangs the
controller, whether in the OP or SERVICE mode. The hang condition can be exited
by activating the START switch.
This test checks the 9403 FIFO's in the controller. The following possible faults
are tested:
• NTORE stuck at 0 or 1 faults
• Data errors within each FIFO
At this point, the microprocessor and PHI are assumed good and errors can be re-
liably reported via the HP-IB. This is the first test that a) reports section numbers,
and b) exits to the controller operating firmware after an error is detected. Even if
test 14 fails, the controller attempts to execute commands and secondaries. Any
operation involving data transfer through the FIFO's will probably fail.
This test checks the PHI/FIFO handshake logic, sector word counters, read full!
write full flip-flop, and EOT detector. The test transfers data from the FIFO,
through the PHI, and back to the FIFO. The PHI is in its offline loopback mode.
This test checks the formatter/separator, serial operation of the FIFO's (both in and
out), the overrun detector, and the EOW/8th word counter. The test is divided into
three subtests:
a. The formatter/separator itself is first tested by passing a known data pattern from
the FIFO through the formatter/separator in its loopback mode and back into the
FIFO. The received data pattern is then compared with the original.
b. The overrun detector is then checked by clearing the FIFO and enabling the
formatter/separator. An overrun will result when the formatter/separator tries to pull
data from an empty FIFO.
c. Finally, the 8th word counter is tested by passing 16 bytes through the formatter/
separator, counting EOW's, and seeing that the 8th word flag is set only after the
16th byte (8th word) is transferred.