HP 7925D Service Manual page 199

7925
nal (RET
=
0) and the active MATCH + SKI signal
(MATCH + SKI
=
1), activates the fine position FET
switch. With this switch closed, the current applied to the
linear motor coil will be determined by the POS signal.
The POS signal is used to provide radial (cylinder) posi-
tion information to the 4ead positioning servo loop. This
signal is derived from th~ servo code which is magneti-
cally recorded on the servo surface (see figure A-8). The
servo code consists of 6720 di-bits per revolution, although
three of these di-bits are not recorded in the index zone. As
the servo surface passes beneath the servo head, a voltage
is magnetically induced. The output from the servo head is
directly coupled to the input of the differential pre-
amplifier stage on track follower PCA-A5. This stage con-
sists of two differential amplifiers coupled together by a
filter network. The gain of the first differential amplifier
is controlled by the output from the servo AGC circuit. The
differential output is filtered and coupled to a second
fixed-gain differential amplifier. The output from the dif-
ferential preamplifier stage can be observed at the test
point on track follower PCA-A5 labeled "PRE". It will be
approximately 1.4 volts peak-to-peak. This output is then
coupled to the input of the phase switchable amplifier
stage. Figure A-8 illustrates the servo and data track as-
signments, as well as the waveforms produced at the
"PRE" test point as the servo head moves across +odd and
-even servo tracks.
The phase switchable amplifier stage provides a low
source impedance servo code output which is either in
phase or 180 degrees out of phase with the output of the
differential preamplifier stage. The phase is determined
by the least significant bit of the addressed cylinder (LSB).
The LSB signal will be active (LSB
=
1) for odd cylinders
and inactive (LSB
=
0) for even cylinders. In the case of an
initial head load, the LSB signal will be inactive
(LSB
=
0).
The output from the phase switchable amplifier is coupled
to the positive and negative peak detectors where the
peaks in the servo code are detected and stored. The peak
detectors are gated by either the REF or REF signal. This
is determined by the state of the LSB signal and an
exclusive-OR acting as a programmable inverter. When
LSB is active (LSB
=
1), the REF signal will gate the peak
detectors and when LSB is inactive (LSB = 0), the REF
signal will gate the peak detectors. In the case of an initial
head load, the REF signal will gate the peak detectors.
The state of the REF signal can be observed at the test
point on track follower PCA-A5 labeled "REF".
The output from each peak detector is buffered by a
unity-gain, non-inverting amplifier and then coupled to
the summing junction of the output summing amplifier.
Also, summed into this junction is the output of the offset
circuit. The output summing amplifier exhibits a gain of 4
to the peak detectors and 0.5 to the offset circuit. The
resultant output from the output summing amplifier is the
POS signal which can be observed at the test point on
track follower PCA-A5 labeled "POS".
Appendix A
The derived POS signal is centered about a ground refer-
ence and it has a scaling factor of 4 volts per one
thousandth of an inch at track center. The signal will be
positive once the servo head detects the edge of the outer
guard band and it will remain positive until the first track
of the servo zone is detected. It will then appear as a
triangular waveform as the servo head moves across the
servo surface from track 0 to 822. Each zero crossing repre-
sents a data track centerline.
Once the track center of cylinder 0 is detected (TCD and
FINE POSITION
=
1), the SB signal will become active
(SB
=
0). This signal will inhibit tachometer feedback to
the head positioning servo loop. The state of the TCD
signal can be observed at the test point on servo PCA-A3
labeled "TCD". After a 1.3 millisecond delay to allow time
for the heads to settle, the drive ready flip-flop will be set.
The set output from the drive ready flip-flop causes the
DRIVE READY lamp to light, the first status flip-flop to
be clocked set, the AGC and carriage back fault detection
circuits to be enabled, and the ACRY signal to become
active (ACRY
=
0). The state of the DRDY signal can be
observed at the test point on drive control PCA-A4 labeled
"DRDY".
The set output from the first status flip-flop causes the
first status, status bit to be active (status bit 4
=
1). This
will notify the controller that the disc drive has completed
an initial head load operation. This status bit can be selec-
tively cleared by the controller it it issues a CLS
command.
When the ACRY signal becomes active (ACRY
=
0), it
cancels the 1667 millisecond timeout cycle; clocks the
ACRY attention flip-flop set; and enables future seek,
recalibrate, or write operations. The state of the ACRY
signal can be observed at the test point on drive control
PCA-A4 labeled "ACRY".
The set output from the ACRY attention flip-flop causes
the attention status bit to be active (status bit 8 = 1). This
will notify the controller that the disc drive has correctly
positioned the heads over cylinder O. This status bit can be
selectively cleared by the controller if it issues a CLS
command.
The heads will remain settled over cylinder 0 until a seek,
recalibrate, or set offset command is decoded; or until they
are unloaded when the RUN/STOP switch is set to STOP;
or until certain fault conditions are detected.
A-45. NORMAL HEAD UNLOAD OPERA-
TION. The heads are automatically unloaded whenever
the RUN/STOP switch is set to STOP (STOP
=
1); an AGC
fault (AGF
=
1), carriage back fault (CBF
=
1), interlock
fault (ILF
=
1), destructive write fault (DWF
=
1), or
timeout fault (TOF
=
1) exists; or the spindle begins to
loose speed (SPU
=
1). When anyone of these conditions
exists, the RET signal will become active (RET
=
1). This
will clear the drive ready and seek home flip-flops, de-
energize the carriage latch solenoid, activate the -slew
FET switch, and initiate a 1667 millisecond timeout cycle.
A-17