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R-V77R
CIRCUIT DESCRIPTION
Block diagram
TICO
PTOO/P20 ©
THO
PTO1/P210
S1/P03 O
SO/P02 O
SCK/P010
INTO/P10 ©
INT1/P11.0
INT2/P12 O
INT3/P13 O
INT4/P00.0
PTHOO—PTHO3 =
22
oe
BIT SEQ.
BUFFER(16)
(rear KT v00-r
(Trot {mer
(__} rort2 K 4 ) P20—P23
(Tarra () nom
fe
Spe
(—\
ronta K 4) P40—P43
PROGRAM
(—} ports Ka ) P50—P53
BASIC
INTERVAL
TIMER
PROGRAM
NTBT
COUNTER
(13)
, TIMER/EVENT
COUNTER
#0
INTTO
TIMER/EVENT
COUNTER
#1
INTT1
DECODE
le
aaah
ANE
P60—P63
INTERFACE
B8064X8 BITS
CONTROL.
DATA MEMORY
=
PORT 6
(3 )
eS
512x4 BITS
=
port?
K 4 )P70-P73
ae
PORT 8
(4 ) P80—P83
ao
porto
{4 ) Po0~P93
(renee [OT n-ne
INTERRUPT
(_)
CONTROL
fx/2N
CPU CLOCK
CLOCK
CLOCK
CLOCK
STAND BY
¢
eleretiaks
(~\
pede
DIVIDER | GENERATOR | CONTROL
(rors
Ka) Geran
THRESHOLD
PORT #0
.
d
o
t
t
t
(—} rort1a _ a ) P140—P143
PCL/P22
x2.
x1
Vpp
Vss RESET
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