MSPM0G350x Mixed-Signal Microcontrollers With CAN-FD Interface
1 Features
•
Core
– Arm
®
32-bit Cortex
®
protection unit, frequency up to 80 MHz
•
Operating characteristics
– Extended temperature: –40°C up to 125°C
– Wide supply voltage range: 1.62 V to 3.6 V
•
Memories
– Up to 128KB of flash memory with error
correction code (ECC)
– Up to 32KB of ECC protected SRAM with
hardware parity
•
High-performance analog peripherals
– Two simultaneous sampling 12-bit 4-Msps
analog-to-digital converters (ADCs) with up to
17 external channels
•
14-bit effective resolution at 250-ksps with
hardware averaging
– One 12-bit 1-MSPS digital-to-analog converter
with integrated output buffer (DAC)
– Two zero-drift zero-crossover chopper op-amps
(OPA)
•
0.5-µV/°C drift with chopping
•
Integrated programmable gain stage, up to
32x
– One general-purpose amplifier (GPAMP)
– Three high-speed comparators (COMP) with 8-
bit reference DACs
•
32-ns propagation delay in high-speed
mode
•
Support low-power mode operation down to
<1 µA
– Programmable analog connections between
ADC, OPAs, COMP and DAC
– Configurable 1.4-V or 2.5-V internal shared
voltage reference (VREF)
– Integrated temperature sensor
•
Optimized low-power modes
– RUN: 96 µA/MHz (CoreMark)
– SLEEP: 458 µA at 4 MHz
– STOP: 47 µA at 32 kHz
– STANDBY: 1.5 µA with RTC and SRAM
retention
– SHUTDOWN: 78 nA with IO wake-up capability
•
Intelligent digital peripherals
– 7-channel DMA controller
– Math accelerator supports DIV, SQRT, MAC
and TRIG computations
– Seven timers supports up to 22 PWM channels
•
One 16-bit general-purpose timer
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. ADVANCE INFORMATION for preproduction products; subject to change
without notice.
-M0+ CPU with memory
MSPM0G3507, MSPM0G3506, MSPM0G3505
SLASEX6A – FEBRUARY 2023 – REVISED JUNE 2023
•
One 16-bit general-purpose timer supports
QEI
•
Two 16-bit general-purpose timers support
low-power operation in STANDBY mode
•
One 32-bit high-resolution general-purpose
timer
•
Two 16-bit advanced timers with deadband
support up to 12 PWM channels
– Two window-watchdog timers
– RTC with alarm and calendar mode
•
Enhanced communication interfaces
– Four UART interfaces; one supports LIN,
IrDA, DALI, Smart Card, Manchester, and
three support low-power operation in STANDBY
mode
2
– Two I
C interfaces support up to FM+ (1
Mbit/s), SMBus/PMBus, and wakeup from
STOP mode
– Two SPIs, one SPI supports up to 32 Mbits/s
– One Controller Area Network (CAN) interface
supports CAN 2.0 A or B and CAN-FD
•
Clock system
– Internal 4- to 32-MHz oscillator with up to
±1.2% accuracy (SYSOSC)
– Phase-locked loop (PLL) up to 80 MHz
– Internal 32-kHz low-frequency oscillator
(LFOSC) with ±3% accuracy
– External 4- to 48-MHz crystal oscillator (HFXT)
– External 32-kHz crystal oscillator(LFXT)
– External clock input
•
Data integrity and encryption
– Cyclic redundancy checker (CRC-16, CRC-32)
– True random number generator (TRNG)
– AES encryption with 128 or 256-bit key
•
Flexible I/O features
– Up to 60 GPIOs
•
Two 5-V tolerant IOs
•
Two high-drive IOs with 20-mA drive
strength
•
Development support
– 2-pin serial wire debug (SWD)
•
Package options
– 64-pin LQFP
– 48-pin LQFP, VQFN
– 32-pin VQFN
– 28-pin VSSOP
•
Family members (also see
– MSPM0G3505: 32KB flash, 16KB RAM
– MSPM0G3506: 64KB flash, 32KB RAM
– MSPM0G3507: 128KB flash, 32KB RAM
Device
Comparison)
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