Texas Instruments MSPM0G350 Series Instruction Manual
Texas Instruments MSPM0G350 Series Instruction Manual

Texas Instruments MSPM0G350 Series Instruction Manual

Mixed-signal microcontrollers with can-fd interface
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MSPM0G350x Mixed-Signal Microcontrollers With CAN-FD Interface

1 Features

Core
– Arm
®
32-bit Cortex
®
protection unit, frequency up to 80 MHz
Operating characteristics
– Extended temperature: –40°C up to 125°C
– Wide supply voltage range: 1.62 V to 3.6 V
Memories
– Up to 128KB of flash memory with error
correction code (ECC)
– Up to 32KB of ECC protected SRAM with
hardware parity
High-performance analog peripherals
– Two simultaneous sampling 12-bit 4-Msps
analog-to-digital converters (ADCs) with up to
17 external channels
14-bit effective resolution at 250-ksps with
hardware averaging
– One 12-bit 1-MSPS digital-to-analog converter
with integrated output buffer (DAC)
– Two zero-drift zero-crossover chopper op-amps
(OPA)
0.5-µV/°C drift with chopping
Integrated programmable gain stage, up to
32x
– One general-purpose amplifier (GPAMP)
– Three high-speed comparators (COMP) with 8-
bit reference DACs
32-ns propagation delay in high-speed
mode
Support low-power mode operation down to
<1 µA
– Programmable analog connections between
ADC, OPAs, COMP and DAC
– Configurable 1.4-V or 2.5-V internal shared
voltage reference (VREF)
– Integrated temperature sensor
Optimized low-power modes
– RUN: 96 µA/MHz (CoreMark)
– SLEEP: 458 µA at 4 MHz
– STOP: 47 µA at 32 kHz
– STANDBY: 1.5 µA with RTC and SRAM
retention
– SHUTDOWN: 78 nA with IO wake-up capability
Intelligent digital peripherals
– 7-channel DMA controller
– Math accelerator supports DIV, SQRT, MAC
and TRIG computations
– Seven timers supports up to 22 PWM channels
One 16-bit general-purpose timer
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. ADVANCE INFORMATION for preproduction products; subject to change
without notice.
-M0+ CPU with memory
MSPM0G3507, MSPM0G3506, MSPM0G3505
SLASEX6A – FEBRUARY 2023 – REVISED JUNE 2023
One 16-bit general-purpose timer supports
QEI
Two 16-bit general-purpose timers support
low-power operation in STANDBY mode
One 32-bit high-resolution general-purpose
timer
Two 16-bit advanced timers with deadband
support up to 12 PWM channels
– Two window-watchdog timers
– RTC with alarm and calendar mode
Enhanced communication interfaces
– Four UART interfaces; one supports LIN,
IrDA, DALI, Smart Card, Manchester, and
three support low-power operation in STANDBY
mode
2
– Two I
C interfaces support up to FM+ (1
Mbit/s), SMBus/PMBus, and wakeup from
STOP mode
– Two SPIs, one SPI supports up to 32 Mbits/s
– One Controller Area Network (CAN) interface
supports CAN 2.0 A or B and CAN-FD
Clock system
– Internal 4- to 32-MHz oscillator with up to
±1.2% accuracy (SYSOSC)
– Phase-locked loop (PLL) up to 80 MHz
– Internal 32-kHz low-frequency oscillator
(LFOSC) with ±3% accuracy
– External 4- to 48-MHz crystal oscillator (HFXT)
– External 32-kHz crystal oscillator(LFXT)
– External clock input
Data integrity and encryption
– Cyclic redundancy checker (CRC-16, CRC-32)
– True random number generator (TRNG)
– AES encryption with 128 or 256-bit key
Flexible I/O features
– Up to 60 GPIOs
Two 5-V tolerant IOs
Two high-drive IOs with 20-mA drive
strength
Development support
– 2-pin serial wire debug (SWD)
Package options
– 64-pin LQFP
– 48-pin LQFP, VQFN
– 32-pin VQFN
– 28-pin VSSOP
Family members (also see
– MSPM0G3505: 32KB flash, 16KB RAM
– MSPM0G3506: 64KB flash, 32KB RAM
– MSPM0G3507: 128KB flash, 32KB RAM
Device
Comparison)

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Summary of Contents for Texas Instruments MSPM0G350 Series

  • Page 1: Features

    MSPM0G3507, MSPM0G3506, MSPM0G3505 SLASEX6A – FEBRUARY 2023 – REVISED JUNE 2023 MSPM0G350x Mixed-Signal Microcontrollers With CAN-FD Interface • One 16-bit general-purpose timer supports 1 Features • Core • Two 16-bit general-purpose timers support low-power operation in STANDBY mode – Arm ®...
  • Page 2: Applications

    See MSP430™ System-Level ESD Considerations for more information. The principles in this application note are applicable to MSPM0 MCUs. Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 3: Functional Block Diagram

    VCORE, NRST PD1, CPU/DMA ACCESS to OPA0 and OPA1, respectively ROSC PD1/PD0, CPU/DMA ACCESS CLK_OUT, FCC_IN PD0, CPU/DMA ACCESS Figure 4-1. MSPM0G350x Functional Block Diagram Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 4: Table Of Contents

    8.3 Power Management Unit (PMU)....... 10.8 Glossary..............77 8.4 Clock Module (CKM)..........54 11 Mechanical, Packaging, and Orderable 8.5 DMA................Information..............8.6 Events............... 12 Revision History............8.7 Memory..............Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 5: Device Comparison

    The package size (length × width) is a nominal value and includes pins, where applicable. For the package dimensions with tolerances, see Section For more information about the device name, see Section 10.2 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 6: Pin Configuration And Functions

    For full descriptions of the pin functions, see the Pin Attributes and Signal Descriptions sections. 6.1 Pin Diagrams Power Reset High-Speed I/O (HSIO) 5-V Tolerant Open-Drain I/O (ODIO) High-Drive I/O (HDIO) Figure 6-1. Pin Diagram Color Coding Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 7 PA30 PA20 / SWCLK PA29 PB17 / A1_4 PA28 PB18 / A1_5 PB19 / A1_6 PA0 / FCC_IN Figure 6-2. 64-Pin PM (LQFP) (Top View) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 8 PA12 / FCC_IN PA4 / LFCLK_IN / LFXOUT PB16 PA5 / HFXIN / FCC_IN PB15 PA6 / HFCLK_IN / HFXOUT Figure 6-3. 48-Pin PT (LQFP) (Top View) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 9 PA4 / LFCLK_IN / LFXOUT PA12 / FCC_IN PA5 / HFXIN / FCC_IN PB16 PA6 / HFCLK_IN / HFXOUT PB15 Thermal pad Figure 6-4. 48-Pin RGZ (VQFN) (Top View) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 10 PA15 / A1_0 PA3 / LFXIN PA14 / CLK_OUT / A0_12 PA13 PA4 / LFCLK_IN / LFXOUT Thermal pad Figure 6-5. 32-Pin RHB (VQFN) (Top View) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 11 PA9 / RTC_OUT / CLK_OUT Figure 6-6. 28-Pin DGS28 (VSSOP) (Top View) Note For full pin configuration and functions for each package option, refer to Pin Attributes Signal Descriptions. Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 12: Pin Attributes

    Standard UART3_TX [2] / UART2_CTS [3] / I2C1_SCL [4] / TIMA0_C3 [5] / UART1_CTS [6] / TIMG6_C0 [ 7] / – – Standard TIMA1_C0 [8] Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 13 TIMG0_C1 [5] / CAN_RX [6] / TIMA0_C3N [7] Speed PA14 UART0_CTS [2] / SPI0_PICO [3] / UART3_TX [4] / High- COMP0_IN2+ / A0_12 TIMG12_C0 [5] / CLK_OUT [6] Speed Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 14 TIMG6_C0 [5] / TIMA1_C0 [6] PB27 COMP2_OUT [2] / SPI1_CS1 [3] / TIMA0_C3N [4] / COMP1_IN0- – – – Standard TIMG6_C1 [5] / TIMA1_C1 [6] Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 15: Signal Descriptions

    – – ADC1 analog input 5 A1_6 – – ADC1 analog input 6 A1_7 ADC1 analog input 7 BSL_invoke Input pin used to invoke bootloader Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 16 Digital low-frequency clock input LFXIN Input for low-frequency crystal oscillator LFXT LFXOUT Output of low-frequency crystal oscillator LFXT ROSC External resistor used for improving oscillator accuracy Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 17 Serial wire debug data input/output FCC_IN Frequency clock counter input GPAMP_IN+ GPAMP non-inverting terminal input General- Purpose GPAMP_IN- GPAMP inverting terminal input Amplifier GPAMP_OUT GPAMP output Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 18 PA29 – – – General-purpose digital I/O PA30 – – – General-purpose digital I/O General-purpose digital I/O with wake up from PA31 – – SHUTDOWN Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 19 General-purpose digital I/O PB27 – – – General-purpose digital I/O I2C0_SCL I2C0 serial clock I2C0_SDA I2C0 serial data I2C1_SCL I2C1 serial clock I2C1_SDA I2C1 serial data Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 20 Power VCORE Regulated core power supply output QFN package exposed thermal pad. TI recommends QFN Pad – – connection to V RTC_OUT RTC clock output Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 21 SPI1 clock signal input – SPI peripheral mode SPI1_SCK Clock signal output – SPI controller mode SPI1_POCI SPI1 controller in/peripheral out SPI1_PICO SPI1 controller out/peripheral in System NRST Reset input active low Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 22 General purpose timer 7 CCR1 capture input/ compare TIMG7_C0 output General purpose timer 7 CCR1 capture input/ compare TIMG7_C1 output General purpose timer 8 CCR0 capture input/ compare TIMG8_C0 output Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 23 Advanced control timer 0 CCR0 capture input/compare TIMA0_C0N output (inverting) Advanced control timer 0 CCR1 capture input/ compare TIMA0_C1 output Advanced control timer 0 CCR1 capture input/ compare TIMA0_C1N output (inverting) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 24 Advanced control timer 0 CCR3 capture input/ compare TIMA1_C0N output (inverting) Advanced control timer 1 CCR1 capture input/ compare TIMA1_C1 output Advanced control timer 1 CCR1 capture input/ compare TIMA1_C1N output (inverting) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 25 UART1 "request to send" flow control output UART2_TX UART2 transmit data UART2_RX UART2 receive data UART2_CTS UART2 "clear to send" flow control input UART2_RTS UART2 "request to send" flow control output Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 26 When using VREF+/- to bring in an external voltage reference for analog peripherals such as the ADC, a decoupling capacitor must be placed on VREF+ to VREF-/GND with a capacitance based on the external reference source Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 27: Connections For Unused Pins

    Section 9.1 Any unused pin with a function that is shared with general-purpose I/O should follow the "PAx and PBx" unused pin connection guidelines. Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 28: Specifications

    MCLK, CPUCLK frequency with 2 flash wait states MCLK, CPUCLK frequency with 1 flash wait state MCLK (PD1 bus clock) MCLK, CPUCLK frequency with 0 flash wait states Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 29: Thermal Information

    Junction-to-case (bottom) thermal resistance °C/W θJC(bot) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 30: Supply Current Characteristics

    STANDBY Mode LFCLK=LFXT, STOPCLKSTBY=0, 6.91 STBY0 RTC enabled LFCLK=LFOSC, STOPCLKSTBY=1, 15.5 RTC enabled 32kHz LFCLK=LFXT, STOPCLKSTBY=1, 15.5 STBY1 RTC enabled LFCLK=LFXT, STOPCLKSTBY=1, 15.6 GPIOA enabled Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 31: Power Supply Sequencing

    Device operating in RUN, SLEEP, or STOP mode. 7.6.2 Power Supply Ramp Figure 7-1 gives the relationship of POR- POR+, BOR0-, and BOR0+ during power-up and power-down. Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 32: Flash Memory Characteristics

    Program time is defined as the time from when the program command is triggered until the command completion interrupt flag is set in the flash controller. Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 33: Timing Characteristics

    The wake-up time is measured from the edge of an external wake-up signal (IOMUX wake-up event) to the time that first instruction of the user program is executed. Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 34: Clock Specifications

    , after which the target accuracy is SYSOSC settle,SYSOSC settle,SYSOSC achieved. Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 35 (unless otherwise noted) PARAMETER TEST CONDITIONS UNIT Low frequency crystal oscillator (LFXT) LFXT frequency 32768 LFXT LFXT duty cycle LFXT Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 36 Manual.Current consumption increases with higher RSEL and start up time is decreases with higher RSEL. The digital clock input (HFCLK_IN) accepts a logic level square wave clock. Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 37: Digital Io

    ≤130 °C VDD≥2.7V, DRV=1, |I =20mA ,max VDD-0.4 VDD≥1.71V, DRV=1, |I =10mA ,max HDIO VDD≥2.7V, DRV=0, |I =6mA ,max VDD-0.4 VDD≥1.71V, DRV=0, |I =2mA ,max Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 38 VDD ≥ 2.7V, DRV = 0, CL= 20pF ODIO VDD ≥ 1.71V, FM , CL= 20pF - 100pF All output ports Output rise/fall time VDD ≥ 1.71V 0.3*f except ODIO Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 39: Analog Mux Vboost

    R– All external reference specifications are measured with V = VREF+ = VDD = 3.3V and V = VREF- = VSS = 0V Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 40 Use the following equations to solve for the minimum sampling time (T) required for an ADC conversion: 1. Tau = (R )* C 2. K= ln(2 /Settling error) – ln((C Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 41: Temperature Sensor

    A ceramic capacitor with package size of 0805 or smaller is preferred. Up to ±20% tolerance is acceptable The VREF module should only be enabled when C is connected and should not be enabled otherwise. VREF Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 42: Comparator (Comp)

    Output voltage range No load, Vref = VDD, DATA = 0x0 0.005 0.05 Output voltage range No load, Vref = VDD, DATA = 0xFFF VDD-0.05 -0.01 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 43 Turn on time from off state (VREF ready) DATA = 0xFFF, Error < ±2 LSB, Vref = internal reference µs ON,12b DATA = 0x1EC->0xFFF->0x1EC, Error< ±2 LSB, Vref = Full scale settling time µs S(FS) internal reference Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 44: Gpamp

    GPAMP disable time disable Cycles = 200 pF, Vstep = 0.3V to VDD - GPAMP settling time Noninverting, unity gain µs SETTLE 0.3V, 0.1%, ENABLE = 0x1 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 45: Opa

    Input capacitance Common mode Open-loop voltage gain, DC = 20kΩ to GND, 0.3<Vo<VDD-0.3 GBW = 0x0 phase margin = 40pF degree GBW = 0x1 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 46 GAIN = 0x2 –1.0% –3 +1.0% inverting gain GAIN = 0x3 –1.2% –7 1.2% GAIN = 0x4 –1.5% –15 1.5% GAIN = 0x5 –2.7% –31 2.7% Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 47: I2C

    (unless otherwise noted) PARAMETERS TEST CONDITIONS UNIT AGFSELx = 0 AGFSELx = 1 Pulse duration of spikes suppressed by input filter AGFSELx = 2 AGFSELx = 3 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 48: Spi

    POCI input data setup time 1.62 < VDD < 2.7V, no delayed sampling SU.CI POCI input data hold time HD.CI PICO output data valid time VALID.CO Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 49 CS, DIS CS, ACC VALID,CO VALID,CO PICO PICO Controller Mode, SPH = 0 Controller Mode, SPH = 1 Figure 7-6. SPI timing diagram - Controller Mode Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 50: Uart

    7.23.1 TRNG Electrical Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS UNIT TRNG TRNG active current TRNG clock = 20MHz µA IACT Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 51: Emulation And Debug

    51.2 µs LAT256 20MHz 7.24 Emulation and Debug 7.24.1 SWD Timing over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS UNIT SWD frequency Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 52: Detailed Description

    OFF: The function is fully powered off in the specified mode, and no configuration information is retained. When waking up from an OFF state, all module registers must be re-configured to the desired settings by application software. Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 53 FULL DRIVE REDUCED DRIVE LOW DRIVE DIS (triggers supported) Core Functions Flash SRAM UART3 SPI0, SPI1 MATHACL Peripherals MCAN0 TIMA0, TIMA1 TIMG6, TIMG7 TIMG1, TIMG12 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 54: Power Management Unit (Pmu)

    For more details, see the PMU chapter of the MSPM0 G-Series 80-MHz Microcontrollers Technical Reference Manual. 8.4 Clock Module (CKM) The clock module provides the following oscillators: • LFOSC: Internal low-frequency oscillator (32KHz) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 55: Dma

    Source Software SPI1 Publisher 1 Generic Subscriber 0 (FSUB_0) SPI1 Publisher 2 Generic Subscriber 1 (FSUB_1) UART3 Publisher 1 AES Publisher 1 UART3 Publisher 2 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 56: Events

    Generic event channel 10 selected 1 : 1 Generic event channel 11 selected 1 : 1 Generic event channel 12 selected 1 : 2 (splitter) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 57: Memory

    0x41C4.0080 0x41C4.0080 0x41C5.0000 to 0x41C5.0000 to 0x41C5.0000 to FACTORY Uncorrected 0x41C5.0080 0x41C5.0080 0x41C5.0080 0x41C6.0000 to 0x41C6.0000 to 0x41C6.0000 to FACTORY ECC code 0x41C6.0080 0x41C6.0080 0x41C6.0080 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 58 0x40410000 0x2000 0x40424000 0x1000 IOMUX 0x40428000 0x2000 0x4042A000 0x2000 0x40440000 0x2000 0x40442000 0x2000 TRNG 0x40444000 0x2000 SPI0 0x40468000 0x2000 SPI1 0x4046A000 0x2000 UART3 0x40500000 0x2000 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 59 0x40558000 0x1000 TIMA0 0x40860000 0x2000 TIMA1 0x40862000 0x2000 TIMG6 0x40868000 0x2000 TIMG7 0x4086A000 0x2000 TIMG12 0x40870000 0x2000 Aliased region of ADC0 and ADC1 memory-mapped registers Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 60: Flash Memory

    Hardware ECC protection (encode and decode) with single bit error correction and double-bit error detection • In-circuit program and erase operations supported across the entire recommended supply range • Small 1kB sector sizes (minimum erase resolution of 1kB) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 61: Sram

    OPA, DAC, etc.) • Software selectable reference: – Configurable internal reference voltage of 1.4V and 2.5V (requires decoupling capacitor on VREF+/- pins) – MCU supply voltage (VDD) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 62: Temperature Sensor

    The comparator peripheral in the device compares the voltage levels on two inputs terminals and provides a digital output based on this comparison. It supports the following key features: Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 63 For more information about device analog connections, see Section 8.30. For more details, see the COMP chapter of the MSPM0 G-Series 80-MHz Microcontrollers Technical Reference Manual. Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 64: Dac

    N-MUX INPUTS MSEL M-MUX INPUTS Open Open Open OPA1_IN0+ OPA1_IN0- OPA1_IN1- OPA1_IN1+ OPA1_IN1- DAC_OUT / OPA1_IN2+ OPA0_RBOT DAC_OUT / OPA1_IN2+ DAC8.1_OUT RTAP OPA0_RTOP VREF RTOP OPA0_RTOP Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 65: Gpamp

    CRC module include: • Support for 16-bit CRC based on CRC16-CCITT • Support for 32-bit CRC based on CRC32-ISO3309 • Support for bit reversal Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 66: Mathacl

    Support IrDA Support ISO7816 Smart Card Support Manchester coding For more details, see the UART chapter of the MSPM0 G-Series 80-MHz Microcontrollers Technical Reference Manual. Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 67: I2C

    MSPM0 G-Series 80-MHz Microcontrollers Technical Reference Manual. Only SPI signals on HSIO pins support data rate > 16 Mbits/s; see the Pin Diagrams section for HSIO pins. Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 68: Wwdt

    Support interrupt/DMA trigger generation and cross peripherals (such as ADC) trigger capability • Cross trigger event logic for Hall sensor inputs Specific features for the advanced timer (TIMAx) include: Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 69 Event Subscriber Port 0 Event Subscriber Port 1 18-31 Reserved For more details, see the TIMx chapter of the MSPM0 G-Series 80-MHz Microcontrollers Technical Reference Manual. Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 70: Device Analog Connections

    Figure 8-1. Device Analog Connection Note Enabling DAC_OUT connects to PA15 therefore it is not recommended to have any external signal on PA15 when using DAC_OUT. Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 71: Input/Output Diagrams

    DOUT Peripheral 15 RSTN Driver Logic Unassigned Peripheral 01 Hi-Z Peripheral 15 RSTN PF != 0 PIPU PIPD SHUTDOWN RELEASE Figure 8-2. Superset Input/Output Diagram Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 72: Serial Wire Debug Interface

    Please refer to Factory Constants chapter of the MSPM0 G-Series 80-MHz Microcontrollers Technical Reference Manual for more information. Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 73: Identification

    The device revision and identification information are also included as part of the top-side marking on the device package. The device-specific errata sheet describes these markings (see Section 10.4) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 74: Applications, Implementation, And Layout

    Debug tool are optional, but SWCLK NRST must be Debug interface pulled high to VDD for the device to start. Figure 9-1. Basic Application Schematic Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 75: Device And Documentation Support

    10.1 Getting Started and Next Steps For more information on the MSP low-power microcontrollers and the tools and libraries that are available to help with development, visit the Texas Instruments Arm Cortex-M0+ MCUs page.
  • Page 76: Tools And Software

    TI Arm Clang is included in Code Composer Studio. GNU Arm Embedded The MSPM0 SDK supports development using the open-source Arm GNU Toolchain Toolchain.Arm GCC is supported by Code Composer Studio (CCS). Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 77: Documentation Support

    All trademarks are the property of their respective owners. 10.7 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
  • Page 78: Mechanical, Packaging, And Orderable Information

    12 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. DATE REVISION NOTES June 2023 Initial Public Release Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MSPM0G3507 MSPM0G3506 MSPM0G3505...
  • Page 79 PACKAGE OUTLINE PM0064A LQFP - 1.6 mm max height SCALE 1.400 PLASTIC QUAD FLATPACK PLASTIC QUAD FLATPACK 10.2 NOTE 3 PIN 1 ID 10.2 12.2 11.8 NOTE 3 0.27 60X 0.5 0.17 4X 7.5 0.08 C A B (0.13) TYP SEATING PLANE 0.08 0.08...
  • Page 80 SOLDER MASK DETAILS 4215162/A 03/2017 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 7. For more information, see Texas Instruments literature number SLMA004 (www.ti.com/lit/slma004). www.ti.com...
  • Page 81 EXAMPLE STENCIL DESIGN PM0064A LQFP - 1.6 mm max height PLASTIC QUAD FLATPACK SYMM 64X (1.5) 64X (0.3) SYMM 60X (0.5) (11.4) (R0.05) TYP (11.4) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:8X 4215162/A 03/2017 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations.
  • Page 82 PACKAGE OUTLINE PT0048A LQFP - 1.6 mm max height SC AL E 2 . 0 0 0 LOW PROFILE QUAD FLATPACK 0.27 0.17 0.08 C A B 44X 0.5 4X 5.5 SEE DETAIL 1.6 MAX SEATING PLANE 0.1 C 1.45 0.25 1.35 GAGE PLANE...
  • Page 83 EXAMPLE BOARD LAYOUT PT0048A LQFP - 1.6 mm max height LOW PROFILE QUAD FLATPACK SYMM SEE SOLDER MASK DETAILS 48X (1.6) 48X (0.3) 44X (0.5) PKG SYMM (8.2) (R0.05) TYP (8.2) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE 10.000 0.05 MAX 0.05 MIN ALLAROUND ALL AROUND...
  • Page 84 EXAMPLE STENCIL DESIGN PT0048A LQFP - 1.6 mm max height LOW PROFILE QUAD FLATPACK SYMM 48X (1.6) 48X (0.3) 44X (0.5) PKG SYMM (8.2) (R0.05) TYP (8.2) SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL SCALE: 10X 4215159/A 12/2021 NOTES: (continued) 7.
  • Page 85 PACKAGE OUTLINE RGZ0048B VQFN - 1 mm max height SC AL E 2 .0 0 0 PLASTIC QUAD FLATPACK - NO LEAD 7.15 6.85 PIN 1 INDEX AREA 7.15 6.85 1 MAX SEATING PLANE 0.05 0.08 C 0.00 2X 5.5 4.1 0.1 (0.2) TYP EXPOSED...
  • Page 86 4218795/B 02/2017 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view.
  • Page 87 EXAMPLE STENCIL DESIGN RGZ0048B VQFN - 1 mm max height PLASTIC QUAD FLATPACK - NO LEAD (1.37) 48X (0.6) 48X (0.24) 44X (0.5) (1.37) SYMM (R0.05) TYP (6.8) METAL ( 1.17) SYMM (6.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 49 73% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE:12X...
  • Page 88 PACKAGE OUTLINE RHB0032E VQFN - 1 mm max height SC AL E 3 .0 0 0 PLASTIC QUAD FLATPACK - NO LEAD PIN 1 INDEX AREA (0.1) SIDE WALL DETAIL OPTIONAL METAL THICKNESS 2 0 .0 0 0 1 MAX SEATING PLANE 0.05 0.08 C...
  • Page 89 4223442/B 08/2019 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view.
  • Page 90 EXAMPLE STENCIL DESIGN RHB0032E VQFN - 1 mm max height PLASTIC QUAD FLATPACK - NO LEAD 4X ( 1.49) (0.845) (R0.05) TYP 32X (0.6) 32X (0.25) 28X (0.5) (0.845) SYMM (4.8) METAL SYMM (4.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 33: 75% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE:20X...
  • Page 91 DETAIL A A 2 0 TYPICAL 4226365/A 10/2020 PowerPAD is a trademark of Texas Instruments. NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice.
  • Page 92 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 8. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature numbers SLMA002 (www.ti.com/lit/slma002) and SLMA004 (www.ti.com/lit/slma004).
  • Page 93 EXAMPLE STENCIL DESIGN DGS0028A VSSOP - 1.1 mm max height SMALL OUTLINE PACKAGE 28X (1.45) SYMM 28X (0.3) (R0.05) TYP 26X (0.5) SYMM (4.4) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE: 13X 4226365/A 10/2020 NOTES: (continued) 11. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations.
  • Page 94 PACKAGE OPTION ADDENDUM www.ti.com 13-Jun-2023 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples Drawing Ball material (4/5) XMSM0G3505SRHBR ACTIVE VQFN 3000 Call TI Call TI -40 to 125 Samples XMSM0G3506SRHBR...
  • Page 95 PACKAGE OPTION ADDENDUM www.ti.com 13-Jun-2023 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
  • Page 96 GENERIC PACKAGE VIEW RHB 32 VQFN - 1 mm max height PLASTIC QUAD FLATPACK - NO LEAD 5 x 5, 0.5 mm pitch Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4224745/A www.ti.com...
  • Page 97 PACKAGE OUTLINE PM0064A LQFP - 1.6 mm max height SCALE 1.400 PLASTIC QUAD FLATPACK PLASTIC QUAD FLATPACK 10.2 NOTE 3 PIN 1 ID 10.2 12.2 11.8 NOTE 3 0.27 60X 0.5 0.17 4X 7.5 0.08 C A B (0.13) TYP SEATING PLANE 0.08 0.08...
  • Page 98 SOLDER MASK DETAILS 4215162/A 03/2017 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 7. For more information, see Texas Instruments literature number SLMA004 (www.ti.com/lit/slma004). www.ti.com...
  • Page 99 EXAMPLE STENCIL DESIGN PM0064A LQFP - 1.6 mm max height PLASTIC QUAD FLATPACK SYMM 64X (1.5) 64X (0.3) SYMM 60X (0.5) (11.4) (R0.05) TYP (11.4) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:8X 4215162/A 03/2017 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations.
  • Page 100 GENERIC PACKAGE VIEW RGZ 48 VQFN - 1 mm max height PLASTIC QUADFLAT PACK- NO LEAD 7 x 7, 0.5 mm pitch Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4224671/A www.ti.com...
  • Page 101 TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2023, Texas Instruments Incorporated...

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