Motorola DSP56156 Manual page 28

ADDRESS
GENERATION
PORT B
UNIT
OR
HOST
ON-CHIP
15
PERIPHERALS
HOST, RSSI0,
7+10
RSSI1, TIMER
GPI/O, CODEC
CODEC,
PORT C
INTERNAL DATA
AND/OR
BUS SWITCH
RSSI0,
AND BIT
RSSI1,
MANIPULATION
UNIT
TIMER
EXTAL
CLOCK
SXFC
AND PLL
CLKO
OnCE
4
Figure 1-3 Detailed ROM Based Part Block Diagram
DSP56156 RAM Based Part
64x16
PROM
2Kx16
PRAM
PLL
MOTOROLA
16-bit DSP
SIGMA
Core
DELTA
CODEC
OnCE
Figure 1-4 DSP56156 RAM and ROM Based Functional Block Diagram
MOTOROLA
DSP56100 CORE BLOCK DIAGRAM DESCRIPTION
PROGRAM CONTROL UNIT
PROGRAM PROGRAM
ADDRESS DECODE
GENERATOR CONTROLLER
RESET
2Kx16
XRAM
SSI0
SSI1
HOST
TIMER
Ext.
BUS
DSP56156 OVERVIEW
XAB1
XAB2
PAB
PROGRAM DATA MEMORY
MEMORY
DATA RAM
PROM
12K x 16 2Kx16
XDB
PDB
GDB
PROGRAM
DATA ALU
INTERRUPT 16x16+40 - 40-BIT MAC
CONTROLLER TWO 40-BIT ACCUMULATORS
MODA/IRQA
MODB/IRQB
MODC/IRQC
DSP56156 ROM Based Part
12Kx16
PROM
PLL
MOTOROLA
16-bit DSP
SIGMA
Core
DELTA
CODEC
OnCE
ADDRESS
EXTERNAL
ADDRESS
BUS
16
SWITCH
10
BUS
CONTROL
16
DATA
EXTERNAL
DATA BUS
SWITCH
16 BITS
2Kx16
XRAM
SSI0
SSI1
HOST
TIMER
Ext.
BUS
1 - 7