Sharp DV-500D Technical Manual page 113

DV-560H
12-11. IC2002, IC2003
12-12. IC402 IX1474GE
Pin No. Terminal name I/O
1 DPCK1
2 DVDD3
3 SVCK1
4 SVCK0
5 DVSS
6 DVDD2
7 N.C.
8 HDWT
9 HDRD
10 HCEN
11 HD0
12 HD1
13 HD2
14 HD3
15 HD4
16 HD5
17 HD6
18 HD7
19 DVSS
20 DVDD5
21 HINT
22 HA0
23 HA1
24 PLCK
AMP
V 2 8
IN
6.2dB
Amp
2.07KΩ
V 1
1
IN
6.2dB
Amp
2.07KΩ
DEM/ECC (DVD)
Operation function
I Signal processing reference clock input.
– Digital power. (3.3V)
I Servo reference clock input. (Oscillation circuit input terminal) 3.3V-I/F Feedback
O Servo reference clock output. (Oscillation circuit input terminal)
– Digital power. (0V)
– Digital power. (3.3V)
– User use prohibited.
I MPU write signal.
I MPU read signal.
I MPU chip selection.
I/O MPU data bus.
I/O MPU data bus.
I/O MPU data bus.
I/O MPU data bus.
I/O MPU data bus.
I/O MPU data bus.
I/O MPU data bus.
I/O MPU data bus.
– Digital power. (0V)
– Digital power. (5V)
O MPU interruption signal. (Occurrence of interruption = "L")
I MPU address bus.
I MPU address bus.
I/O Read channel clock input/output terminal.
+
V
7
V
75Ω
Driver
2.2KΩ
V
75Ω
Driver
750Ω
2.2KΩ
V
SAG correction terminal
2
GND
12-20
2
OUT
5
6 NC
1
OUT
4
3
1
SAG
Remarks
0.5-3.3Vp-p Feedback
resistor built in.
For logic cell
resistor built in.
For logic cell
For logic cell
Open
TTL level
TTL level
TTL level
TTL level
TTL level
TTL level
TTL level
TTL level
TTL level
TTL level
TTL level
For I/O cell
For I/O cell
OPEN DRAIN
TTL level
TTL level