Cgsyscr] (System Clock Control Register) - Toshiba TXZ+ Series Reference Manual

1.4.2.3. [CGSYSCR] (System clock control register)

Bit Bit Symbol
31:28 -
27:24 PRCKST[3:0]
23:19 -
18:16 GEARST[2:0]
15:12 -
11:8 PRCK[3:0]
7:3 -
2:0 GEAR[2:0]
After
Type
reset
0 R Read as "0"
Indicates a prescaler clock (ΦT0) selection.
0000: fc
0001: fc / 2
0x0 R
0010: fc / 4
0011: fc / 8
Others: Reserved
0 R Read as "0".
Indicates selection status of the gear ratio of the system clock
(fsys).
000: fc
0x0 R 001: fc / 2
010: fc / 4
011: fc / 8
Others: Reserved
0 R Read as "0"
Selects a prescaler clock (ΦT0).
0000: fc
0001: fc / 2
0x0 R/W 0010: fc / 4
0011: fc / 8
Others: Reserved
Selects a prescaler clock for the peripheral functions.
0 R Read as "0"
Selects a gear ratio of the system clock (fsys).
000: fc
001: fc / 2
0x0 R/W
010: fc / 4
011: fc / 8
Others: Reserved
37 / 72
TMPM3H Group(1)
Clock Control and Operation Mode
Function
0100: fc / 16 1000: fc / 256
0101: fc / 32 1001: fc / 512
0110: fc / 64
0111: fc / 128
100: fc/16
0100: fc / 16 1000: fc / 256
0101: fc / 32 1001: fc / 512
0110: fc / 64
0111: fc / 128
100: fc / 16
TXZ+ Family
2022-05-10
Rev. 1.3