Asus AAEON GENE-CML5 User Manual page 71

3.5” subcompact board
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Options Summary
A parity bit can be sent with the data bits to detect some transmission errors.
Even: parity bit is 0 if the num of 1's in the data bits is even. Odd: parity bit is 0 if
num of 1's in the data bits is odd. Mark: parity bit is always 1. Space: Parity bit is
always 0. Mark and Space Parity do not allow for error detection. They can be
used as an additional data bit.
Stop Bits
Stop bits indicate the end of a serial data packet. (A start bit indicates the
beginning). The standard setting is 1 stop bit. Communication with slow devices
may require more than 1 stop bit.
Flow Control
Flow control can prevent data loss from buffer overflow. When sending data, if the
receiving buffers are full, a 'stop' signal can be sent to stop the data flow. Once the
buffers are empty, a 'start' signal can be sent to re-start the flow. Hardware flow
control uses two wires to send start/stop signals.
VT-UTF8 Combo Key
Support
Enable VT-UTF8 Combination Key Support for ANSI/VT100 terminals
Recorder Mode
With this mode enabled only text will be sent. This is to capture Terminal data.
Resolution 100x31
Enables or disables extended terminal resolution
Putty KeyPad
Select FunctionKey and KeyPad on Putty.
Chapter 3 – AMI BIOS Setup
Even
Odd
Mark
Space
1
Optimal Default, Failsafe Default
2
None
Optimal Default, Failsafe Default
Hardware
RTS/CTS
Disabled
Enabled
Optimal Default, Failsafe Default
Disabled
Optimal Default, Failsafe Default
Enabled
Disabled
Optimal Default, Failsafe Default
Enabled
VT100
Optimal Default, Failsafe Default
LINUX
XTERMR6
SCO
ESCN
VT400
58

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