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MDT memory structure
Bosch Rexroth AG, MIT: ID 40, 3 842 530 344/2014-05
PROOF COPy 1 | 20.05.2014 | FOR INTERNAL USE ONLy
4.2.3
MDT register area
The register area contains the MDT status register, the MDT pointers and the MDT ID
code.
4.2.3.1
MDT status register
The MDT status register consists of two bytes.
The first MDT status byte contains the error flags and MDT type code according to
the following table:
Table 7: Meaning of bits in MDT status byte
Bit 7
Bit 6
Bit 5
Checksum
MDT type code
error
Bit 0: reserved in the ID 40, value = 0. In the ID 80/E data carriers, bit 0 indicates
battery errors when set.
Bit 1: set when the data transmission to the read/write head was unexpectedly
interrupted. Cause: the MDT is no longer in the field of the SLK.
Bit 2: set for checksum errors in the user data area.
Bit 3: set for checksum errors in pointers 1 to 3.
Bits 4 to 6: coding for the MDT type:
000:
8 kB memory
001:
80 byte memory
011:
2 kB memory
100:
8 kB memory
101:
32 kB memory
Bit 7: set when at least one of bits 1 to 3 is set
The second MDT status byte is reserved in the ID 40 and has a value of 0xF0.
For ID 80/E data carriers, the voltage of the buffer battery is coded in this status
byte.
The first MDT status byte is an error display and can be reset to any value through
write access. Previously set error flags (bits 1 to 3 and bit 7) are deleted, the MDT
type code remains unchanged.
If a memory error has been indicated (bit 2), the entire 16-byte block containing the
error has to be formatted or written. This re-establishes the integrity of the memory
block. Begin formatting on an address divisible by 16, e.g., 0x0130.
Resetting the MDT status only deletes the error flags and does not re-establish
memory integrity.
Bit 4
Bit 3
Pointer
error
ID 80/E - first generation MDT
ID 80/E - MDT80
ID 40/MDT2K
ID 40/MDT8K and ID 80/E - MDT8k
ID 40/MDT32K
Bit 2
Bit 1
Bit 0
Commu-
Memory
nication
reserved
error
error