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Vectored interrupts. The ZPB is supplied with logic to
respond to an interrupt request on the vectored interrupt
request lines VI0-VI7 by generating the indicated RST
instruction.
This logic may be disabled by installing the
"ID" jumper above location 7E.
This will allow some other
board to respond to interrupt conditions.
PROM option. If the PROM option is installed, then the "PE"
trace to the left of location 3G must be cut to enable the
on-board PROM.
PROM Address Selection.
The lK bytes of on-board, PROM can
be
selecte~ ~o
reside in any of sixty-four lK regions of the
Z80 address space.
The address selection logic compares the
six high order address bits (A10-A15) from the Z80 against
the six bits specified with jumper wires on the header at
location 5E.
Pins 8-13 correspond to the six address bits
A10-A15, respectively.
All bits that should match a "zero"
bi t should have their corresp,onding pins connected to pin 1
or pin 2 with jumper wires.
All bits that should match a
"one" bit should have their corresponding pins connected to
pin 6 or pin 7 with jumper wires.
Figure lP shows the
jumper pin assignments and some examples.
Auto-Jump Address Selection.
Any of the 64K different
addresses may be specified as the auto-jump address with
jumper wires on the 16 pin header at location 2E.
The eight
pins 9-16 on the header correspond to pairs of address bits
according to the following table.
9
HJ
Low Addr Bit
o
1
High Addr Bit
8
9
11
2
10
12
3
11
13
4
12
14
5
13
15
'\
6
14
16
7
15
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.
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The address bit pins 9-16 should each be connected to one of
,-~_::
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the pins 1-8 according to the following table:
?\l:
Connect to pin 1 or 2 if both the high order and low
order address bits of the pair are "ones".
Connect to pin 3 or 4 if the high order address bit is a
"one" and the low order address
bit is a "zero".
Connect to pin 5 or 6 if the high order address bit is a
"zero" and the low order address bit is a "one".
North Star Z80A PROCESSOR BOARD
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