Fig. 4-4 Timing Characteristics Of Dai To Microcontroller; Fig. 4-5 Timing Characteristics Of Dai To Codec - Siemens M20 Terminal Technical Description

Siemens Information and Communication Products
VSFS_V Synchronisation
VSCLK_V Clock
VSDO_V Data output
VSDI_V Data Input
Note: data clock (VSCLK_C, VSCKL_V): 104 kHz, word length: 13 bits, synchronisation pulse rate (VSFS_C,
VSFS_V): 8 kHz.
For detailed information on timing characteristics, see
.The corresponding timing values can be found in
stics of DAI to codec
VSCLK (I)
VSFS (I)
VSDI (I)
VSDO (O)
Fig. 4-4 Timing characteristics of DAI to microcontroller
VSCLK (O)
VSFS (O)
VSDI (I)
VSDO (O)
Fig. 4-5 Timing characteristics of DAI to codec
Parameter Comment
t VSDI setup time before VSCLK low
43
t VSDI hold time after VSCLK low
44
t VSFS delay from VSCLK high
47
t VSFS hold time after VSCLK high
48
t VSDO hold time after VSCLK high
49
t VSDO delay from VSCLK high
50
t VSCLK period
90
t VSFS setup time before VSCLK low
91
t VSFS hold time after VSCLK low
92
t VSDI setup time before VSCLK low
93
Version 8 dated 15.03.00
O 2.8V to codec
O 2.8V to codec
O 2.8V to codec
I 2.8V to codec
Timing characteristics of DAI to microcontroller
t
90
t
92
t
91
t
t
93
D15 D14
D15
t
47
t
48
D15 D14
t
50
t
49
D15 D14
Timing characteristics of DAI
94
t
95
D14 D13
t
43
t
D4 D3
D4 D3
Min.
25
10
-20
-20
4
7
4
Hardware interfaces
and
Timing characteri-
.
44
D15
D15
Typ. Max. Units
ns
ns
25 ns
ns
ns
20 ns
9615 ns
ns
ns
ns
A
23