NEC 78K0 Series User Manual page 343

(2) Generation of serial clock
A serial clock to be generated can be specified by using baud rate generator control register 0 (BRGC0).
Select the clock to be input to the 5-bit counter by using bits 7 and 6 (TPS01 and TPS00) of BRGC0.
Bits 4 to 0 (MDL04 to MDL00) of BRGC0 can be used to select the division value (f
counter.
TPS01 TPS00
0
0
1
1
(a) Baud rate
The baud rate can be calculated by the following expression.
f
XCLK0
• Baud rate =
2 × k
f : Frequency of base clock selected by the TPS01 and TPS00 bits of the BRGC0 register
XCLK0
k: Value set by the MDL04 to MDL00 bits of the BRGC0 register (k = 8, 9, 10, ..., 31)
(b) Error of baud rate
The baud rate error can be calculated by the following expression.
Actual baud rate (baud rate with error)
• Error (%) =
Desired baud rate (correct baud rate)
Cautions 1. Keep the baud rate error during transmission to within the permissible error range at
the reception destination.
2. Make sure that the baud rate error during reception satisfies the range shown in (4)
Permissible baud rate range during reception.
Example: Frequency of base clock = 2.5 MHz = 2,500,000 Hz
Set value of MDL04 to MDL00 bits of BRGC0 register = 10000B (k = 16)
Target baud rate = 76,800 bps
Baud rate = 2.5 M/(2 × 16)
Error = (78,125/76,800 − 1) × 100
CHAPTER 14 SERIAL INTERFACE UART0
Table 14-4. Set Value of TPS01 and TPS00
f = 2 MHz
PRS
0 TM50 output
1 f /2 1 MHz
PRS
3
0 f /2 250 kHz
PRS
5
1 f /2 62.5 kHz
PRS
[bps]
= 2,500,000/(2 × 16) = 78,125 [bps]
= 1.725 [%]
Preliminary User's Manual U17260EJ3V1UD
Base clock (f ) selection
XCLK0
f = 5 MHz f = 10 MHz
PRS PRS
2.5 MHz 5 MHz
625 kHz 1.25 MHz
156.25 kHz 312.5 kHz
− 1 × 100 [%]
/8 to f /31) of the 5-bit
XCLK0 XCLK0
f = 20 MHz
PRS
10 MHz
2.5 MHz
625 kHz
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