NEC 78K0 Series User Manual page 306

(7) 8-bit A/D conversion result register (ADCRH)
The A/D conversion result is loaded from the successive approximation register to this register each time A/D
conversion is completed, and the ADCRH register stores the higher 8 bits of the A/D conversion result.
Caution When data is read from ADCR and ADCRH, a wait cycle is generated. Do not read data from
ADCR and ADCRH when the CPU is operating on the subsystem clock and the peripheral
hardware clock is stopped. For details, see CHAPTER 31 CAUTIONS FOR WAIT.
(8) Controller
This circuit controls the conversion time of an input analog signal that is to be converted into a digital signal, as
well as starting and stopping of the conversion operation. When A/D conversion has been completed, this
controller generates INTAD.
(9) AV pin
REF
This pin inputs an analog power/reference voltage to the A/D converter. Make this pin the same potential as the
V pin when port 2 is used as a digital port.
DD
The signal input to ANI0 to ANI7 is converted into a digital signal, based on the voltage applied across AV
AV .
SS
(10) AV pin
SS
This is the ground potential pin of the A/D converter. Always use this pin at the same potential as that of the V
pin even when the A/D converter is not used.
(11) A/D converter mode register (ADM)
This register is used to set the conversion time of the analog input signal to be converted, and to start or stop the
conversion operation.
(12) A/D port configuration register (ADPC)
This register switches the ANI0/P20 to ANI7/P27 pins to analog input of A/D converter or digital I/O of port.
(13) Analog input channel specification register (ADS)
This register is used to specify the port that inputs the analog voltage to be converted into a digital signal.
(14) Port mode register 2 (PM2)
This register switches the ANI0/P20 to ANI7/P27 pins to input or output.
306
CHAPTER 13 A/D CONVERTER
Preliminary User's Manual U17260EJ3V1UD
and
REF
SS