CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
Figure 7-42. Timing Example of Free-Running Timer Mode
(CR00n: Capture Register, CR01n: Capture Register) (1/2)
(a) TOC0n = 13H, PRM0n = 50H, CRC0n = 05H, TMC0n = 04H
FFFFH
TM0n register
0000H
Operable bits
00
(TMC0n3, TMC0n2)
Capture trigger input
(TI00n)
Capture register
(CR01n)
Capture interrupt
(INTTM01n)
Capture trigger input
(TI01n)
Capture register
0000H
(CR00n)
Capture interrupt
(INTTM00n)
Overflow flag
(OVF0n)
M
N
A
B
01
0 write clear
Preliminary User's Manual U17260EJ3V1UD
P
S
C
D
0 write clear
0 write clear
Q
E
0 write clear
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