Mitsubishi Electric MELSEC-Q Series Programming Manual page 99

■Step END instruction (r)
• A specified step at a specified block is forcibly deactivated. "Coil HOLD" and "operation HOLD" steps are subject to this
instruction.
• When the number of active steps in the corresponding block reaches 0 due to the execution of this instruction, END step
processing is performed and the block becomes inactive. When the bock START/END bit of the SFC information devices
has been set, the corresponding bit device changes from ON to OFF.
• If the RST instruction is executed at a step located in a parallel branch, the parallel coupling condition will remain
unsatisfied.
• If a specified step is already inactive when this instruction is executed, the instruction will be ignored (equivalent to the NOP
instruction).
• When the operation output is used to end the step, do not specify the current step as the specified step number. If the
current step is designated as the specified step number, normal operation will not be performed.
• Specify the step as described below.
Item
In the case of SFC program
In the case of sequence program
Operation Error
Error code Description
4631 When no specified step is present or the SFC program is in stand-by mode
4505 If using the own step as the specification step No. (Basic model QCPU, Universal model QCPU, and LCPU)
Description
Use "Sn" when specifying the step in the current block.
Use "BLm\Sn" when specifying the step in another block.
Use "BLm\Sn" when executing the step END instruction in the sequence program.
When the block number is not specified, specify the block number with the BRSET instruction. Note, however, that the
following CPU modules cannot use the BRSET instruction. When no block number is specified, the block 0 is set.
• Basic model QCPU
• Universal model QCPU whose serial number (first five digits) is "13101" or earlier
• LCPU
4.4 Controlling SFC Programs by Instructions (SFC Control Instructions)
4 SFC PROGRAM CONFIGURATION
4
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