Sharp ER-A770 Manual page 39

Pin
Name ER-A770
NO.
48 /CTS3 GND
49 RCVDT3 GND
50 /CI3 GND
51 /CS3 /SRCS
52 D0 D0
53 D1 D1
54 D2 D2
55 D3 D3
56 GND GND
57 D4 D4
58 D5 D5
59 D6 D6
60 D7 D7
61 GND GND
62 VCC VCC
63 X1 NC
64 X2 #
65 XOUT CLK_USART
66 TRCK NC
67 AB0 AH0
68 AB1 AH1
69 US1CH GND
70 PX NC
71 /POF /POFF
72 /RSRQ /IRQ1
73 /TRV GND
74 RXDATA0 NC
75 TXE /SRESET
76 /TRRQ /TRQ2
77 /TRQ1 /TRQ1
78 /TRQ2 NC
79 A0 A0
80 A1 A1
81 A2 A2
82 A3 A3
83 A4 A4
84 A5 A5
85 /OPTCS /OPTCS
86 /RD /RDO
87 /WR /WRO
88 /RES /RES
89 DB0 DB0
90 DB1 DB1
91 DB2 DB2
92 DB3 DB3
93 GND GND
94 DB4 DB4
95 DB5 DB5
96 DB6 DB6
I/O Description
IS GND
IS GND
IS GND
RS-232/INLINE chip
O
select signal
IO Data bus (CPU)
IO Data bus (CPU)
IO Data bus (CPU)
IO Data bus (CPU)
GND
IO Data bus (CPU)
IO Data bus (CPU)
IO Data bus (CPU)
IO Data bus (CPU)
GND
+5V
O OSI14 NC
I OSI14 System clock
O Clock (USART)
O NC
Address bus for
O
USART
Address bus for
O
USART
IS GND
O NC
IS POFF signal
3S RS232 INTRRUPT
IS GND
O NC
INLINE SOFT
O
RESET
3S INLINE INTRRUPT
TIMER INTRRUPT
ON6
(RS232)
TIMER INTRRUPT
ON6
(INLINE)
I Address bus for CPU
I Address bus for CPU
I Address bus for CPU
I Address bus for CPU
I Address bus for CPU
I Address bus for CPU
Option chip select
I
(from MPCA)
Read signal (from
I
CPU)
Write signal (from
I
CPU)
Reset signal (from
IS
CPU)
IO DATA BUS (USART)
IO DATA BUS (USART)
IO DATA BUS (USART)
IO DATA BUS (USART)
GND
IO DATA BUS (USART)
IO DATA BUS (USART)
IO DATA BUS (USART)
Pin
Name ER-A770
NO.
97 DB7 DB7
98 /R /RDH
99 /W /WRH
100 VCC VCC
101 GND GND
102 RES RES USART
103 TRNCLK GND
104 RCVCLK GND
105 DBTST /SRCS
106 UTST VCC
107 /CSA /CS1
108 TRNDTA TXD1
109 /DTRA /DTR1
110 /RTSA NC
111 RCVDTA RCVDT1
112 /CTSA GND
113 /DSRA /DSR1
114 TRNRDYA TRNRDY1
115 RCVRDYA RCVRDY1
116 TRNEMPA TRNEMP1
117 SYCBKA BRK1
118 GND GND
119 /CSB /CS2
120 TRNDTB TXD2
121 /DTRB /DTR2
122 /RTSB NC
123 RCVDTB RCVDT2
124 /CTSB GND
125 /DSRB /DSR2
126 TRNRDYB TRNRDY2
127 RCVRDYB RCVRDY2
128 TRNEMPB TRNEMP2
129 SYCBKB BRK2
130 GND GND
131 /CSC /CS3
132 TRNDTC TXD3
133 /DTRC /DTR3
134 /RTSC /RTS3
135 RCVDTC RCVDT3
136 /CTSC GND
137 /DSRC /DSR3
138 TRNRDYC TRNRDY3
139 RCVRDYC RCVRDY3
140 TRNEMPC TRNEMP3
141 SYCBKC NC
I/O Description
IO DATA BUS (USART)
Read signal (to
O
USART)
Write signal (to
O
USART)
+5V
GND
Reset signal (to
O
USART)
I GND
I GND
RS-232/INLINE
ID
USART chip select
ID +5V
USART_A chip
IS
select
RS-232 transmission
O
data signal
RS-232 data
O
terminal ready signal
O NC
RS-232 reception
IS
data signal
IS GND
RS-232 data set
IS
ready signal
RS-232 data
O transmission enable
signal
RS-232 data
O
reception enable
signal
RS-232 transmission
O
buffer empty signal
Break code detection
IO
signal
GND
IS USART_B chip select
O NC
O NC
O NC
IS GND
IS GND
IS GND
O NC
O NC
O NC
IO NC
GND
IS USART_C chip select
O NC
O NC
O NC
IS GND
IS GND
IS GND
O NC
O NC
O NC
IO NC