Register Configuration; System Control Register (Syscr) - Hitachi F-ZTAT H8/3039 Series Hardware Manual

Single-chip microcomputer
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17.2

Register Configuration

This LSI has a system control register (SYSCR) that controls the power-down state, and a module
standby control register (MSTCR) that controls the module standby function. Table 17-2
summarizes this register.
Table 17-2 Register Configuration
Address*
Name
H'FFF2
System control register
H'FF5E
Module standby control
register
Note: * Lower 16 bits of the address.
17.2.1

System Control Register (SYSCR)

Bit
SSBY
Initial value
Read/Write
R/W
Software standby
Enables transition to
software standby mode
SYSCR is an 8-bit readable/writable register. Bit 7 (SSBY) and bits 6 to 4 (STS2 to STS0) control
the power-down state. For information on the other SYSCR bits, see section 3.3, System Control
Register.
7
6
STS2
STS1
0
0
R/W
R/W
Standby timer select 2 to 0
These bits select the
waiting time at exit from
software standby mode
Abbreviation
SYSCR
MSTCR
5
4
STS0
UE
0
0
R/W
R/W
User bit enable
R/W
R/W
R/W
3
2
NMIEG
1
0
R/W
Reserved bit
NMI edge select
Initial Value
H'0B
H'40
1
0
RAME
1
1
R/W
RAM enable
503

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