Register Descriptions; Timer Start Register (Tstr) - Hitachi F-ZTAT H8/3039 Series Hardware Manual

8.2 Register Descriptions

8.2.1 Timer Start Register (TSTR)

TSTR is an 8-bit readable/writable register that starts and stops the timer counter (TCNT) in
channels 0 to 4.
Bit
Initial value
Read/Write
TSTR is initialized to H'E0 by a reset and in standby mode.
Bits 7 to 5—Reserved: These bits cannot be modified and are always read as 1.
Bit 4—Counter Start 4 (STR4): Starts and stops timer counter 4 (TCNT4).
Bit4
STR4 Description
0 TCNT4 is halted
1 TCNT4 is counting
Bit 3—Counter Start 3 (STR3): Starts and stops timer counter 3 (TCNT3).
Bit 3
STR3 Description
0 TCNT3 is halted
1 TCNT3 is counting
Bit 2—Counter Start 2 (STR2): Starts and stops timer counter 2 (TCNT2).
Bit 2
STR2 Description
0 TCNT2 is halted
1 TCNT2 is counting
198
7 6
— —
1 1
— —
Reserved bits
5 4
— STR4 STR3
1 0
— R/W R/W
3 2
STR2 STR1
0 0
R/W R/W
Counter start 4 to 0
These bits start and
stop TCNT4 to TCNT0
1 0
STR0
0 0
R/W
(Initial value)
(Initial value)
(Initial value)