A/D Control Register (Adcr) - Hitachi F-ZTAT H8/3039 Series Hardware Manual

Single-chip microcomputer
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13.2.3 A/D Control Register (ADCR)

Bit
TRGE
Initial value
Read/Write
R/W
Trigger enable
Enables or disables external triggering of A/D conversion
ADCR is an 8-bit readable/writable register that enables or disables external triggering of A/D
conversion. ADCR is initialized to H'7F by a reset and in standby mode.
Bit 7—Trigger Enable (TRGE): Enables or disables external triggering of A/D conversion.
Bit 7
TRGE
Description
0
A/D conversion cannot be externally triggered
1
A/D conversion starts at the falling edge of the external trigger signal (ADTRG)
Bits 6 to 0—Reserved: These bits cannot be modified and are always read as 1.
7
6
0
1
5
4
1
1
Reserved bits
3
2
1
1
1
0
1
1
(Initial value)
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