6.9 Ultra DMA timings
The Ultra DMA timings meet Mode 0, 1, 2, and 4, 5 and 6 of the Ultra DMA Protocol.
6.9.1 Initiating Read DMA
DMARQ
DMACK-
STOP
HDMARDY-
DSTROBE
DD(15:0)
Table 20: Ultra DMA cycle timings (Initiating Read)
PARAMETER
DESCRIPTION
(all values in ns)
tUI
Unlimited interlock time
tACK
Setup time for DMACK-
tENV
Envelope time
tZI-
Minimum time before
ORDY
driving IORDY
tFS
First DSTROBE time
tCYC
Cycle time
t2CYC Two cycle time
tAZ
Maximum time allowed
for output drivers to
release
tZAD
Drivers to assert
tDS
Data setup time at host
tDH
Data hold time at host
tDZFS
Time from data ouput
released-to-driving until
the first transition of crit-
ical timing
tUI
tACK
tENV
tACK
tENV
tZIORDY
tAZ
xxxxxxxxxxxxxxxxxxxxxxxxxxx
Host drives DD
MODE 0
MODE 1
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX
0
–
0
–
20
–
20
–
20
70
20
70
0
–
0
–
0
230
0
200
112
–
73
–
230
–
154
–
–
10
–
10
0
–
0
–
15
–
10
–
5
–
5
–
70
–
48
–
Deskstar 7K160 Hard Disk Drive Specification
t2CYC
tFS
tCYC
tDS
tZAD
xxx
xxxx
RD Data
RD Data
Device drives DD
MODE 2
MODE 3
0
0
0
–
20
–
20
–
20
70
20
55
0
–
0
–
0
170
0
130
54
–
39
–
115
–
86
–
–
10
–
10
0
–
0
–
7
–
7
–
5
–
5
–
31
–
20
–
32
tCYC
tDH
xxx
RD Data
MODE 4
MODE 5
0
–
0
–
20
–
20
–
20
55
20
50
0
–
0
–
0
120
–
90
25
–
17
–
–
57
–
38
–
10
10
0
–
0
–
5
–
4.8
–
5
–
4.8
–
6.7
–
25
–
MODE 6
0
–
20
–
20
50
0
–
0
80
13
–
29
–
10
–
0
–
2.6
–
3.5
–
17.5
–