Pio Timings; Write Drq Interval Time; Read Drq Interval Time; Table 17: Pio Cycle Timings Chart - Hitachi HTS542525K9SA00 Specifications

6.7 PIO timings

The PIO cycle timings meet Mode 4 of the ATA/ATAPI-6 description.

Table 17: PIO cycle timings chart

t0
t1
t2
t2i
t3
t4
t5
t6
t9
tA
tB

6.7.1 Write DRQ interval time

For write sectors and write multiple operations 3.8 ms is inserted from the end of negation of the DRQ bit until set-
ting of the next DRQ bit.

6.7.2 Read DRQ interval time

For read sectors and read multiple operations the interval from the end of negation of the DRQ bit until setting of
the next DRQ bit is as follows:
PARAMETER DESCRIPTION
Cycle time
Address valid to DIOR-/DIOW- setup
DIOR-/DIOW- pulse width
DIOR-/DIOW- recovery time
DIOW- data setup
DIOW- data hold
DIOR- data setup
DIOR- data hold
DIOR-/DIOW- to address valid hold
IORDY setup width
IORDY pulse width
Deskstar 7K160 Hard Disk Drive Specification
MIN (ns)
120
25
70
25
20
10
20
5
10
–
–
30
MAX (ns)
–
–
–
–
–
–
–
–
–
35
1250