Hitachi Relion 670 Series Applications Manual page 13

1MRK511407-UUS Rev. N
15.1.3.4
15.1.3.5
15.1.3.6
15.1.4 Setting guidelines.................................................................................................................. 212
15.1.4.1
15.2 Trip matrix logic TMAGAPC.................................................................................................... 215
15.2.1 Identification.......................................................................................................................... 215
15.3 Logic for group alarm ALMCALH............................................................................................ 215
15.3.1 Identification.......................................................................................................................... 215
15.3.2 Application.............................................................................................................................216
15.3.3 Setting guidelines.................................................................................................................. 216
15.4 Logic for group alarm WRNCALH........................................................................................... 216
15.4.1 Identification.......................................................................................................................... 216
15.4.1.1
15.4.1.2
15.5 Logic for group indication INDCALH....................................................................................... 216
15.5.1 Identification.......................................................................................................................... 216
15.5.1.1
15.5.1.2
15.6 Configurable logic blocks........................................................................................................ 217
15.6.1 Application.............................................................................................................................217
15.6.2 Setting guidelines.................................................................................................................. 217
15.6.2.1
15.7 Fixed signal function block FXDSIGN..................................................................................... 218
15.7.1 Application ............................................................................................................................218
15.8 Boolean 16 to Integer conversion B16I................................................................................... 219
15.8.1 Identification.......................................................................................................................... 219
15.8.2 Application.............................................................................................................................220
15.9 Boolean to integer conversion with logical node representation, 16 bit BTIGAPC..................220
15.9.1 Identification.......................................................................................................................... 221
15.9.2 Application.............................................................................................................................221
15.10 Integer to Boolean 16 conversion IB16................................................................................... 222
15.10.1 Identification.......................................................................................................................... 222
15.10.2 Application.............................................................................................................................222
15.11 Integer to boolean conversion with logical node representation, 16 bit ITBGAPC..................223
15.11.1 Identification.......................................................................................................................... 223
15.11.2 Application.............................................................................................................................223
15.12 Elapsed time integrator with limit transgression and overflow supervision TEIGAPC.............224
15.12.1 Identification.......................................................................................................................... 224
15.12.2 Application ............................................................................................................................224
15.12.3 Setting guidelines.................................................................................................................. 224
15.13 Comparator for integer inputs - INTCOMP..............................................................................225
15.13.1 Identification.......................................................................................................................... 225
Phasor measurement unit RES670
Application manual
Lock-out............................................................................................................................208
Example of directional data.............................................................................................. 209
Blocking of the function block...........................................................................................212
Setting example................................................................................................................212
Application........................................................................................................................216
Setting guidelines............................................................................................................. 216
Application........................................................................................................................216
Setting guidelines............................................................................................................. 217
Configuration.................................................................................................................... 217
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