Breq Input Timing; Transition To Software Standby Mode - Hitachi H8/3048 Hardware Manual

Single-chip microcomputer
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BREQ Input Timing

6.4.3
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After driving the BREQ pin low, hold it low until BACK goes low. If BREQ returns to the high
level before BACK goes low, the bus arbiter may operate incorrectly.
To terminate the external-bus-released state, hold the BREQ signal high for at least three states.
If BREQ is high for too short an interval, the bus arbiter may operate incorrectly.

6.4.4 Transition To Software Standby Mode

If contention occurs between a transition to software standby mode and a bus request from an
external bus master, the bus may be released for one state just before the transition to software
standby mode (see figure 6-23). When using software standby mode, clear the BRLE bit to 0 in
BRCR before executing the SLEEP instruction.
ø
BREQ
BACK
Address bus
Strobe
Figure 6-23 Contention between Bus-Released State and Software Standby Mode
Bus-released state
Software standby mode
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