Notes On Use Of Bit Manipulation Instructions; Addressing Modes And Effective Address Calculation; Addressing Modes - Hitachi H8/3035 Series Hardware Manual

Operation field only
Operation field and register fields
op
Operation field, register fields, and effective address extension
op
Operation field, effective address extension, and condition field
op

2.6.5 Notes on Use of Bit Manipulation Instructions

The BSET, BCLR, BNOT, BST, and BIST instructions read a byte of data, modify a bit in the
byte, then write the byte back. Care is required when these instructions are used to access
registers with write-only bits, or to access ports.
The BCLR instruction can be used to clear flags in the on-chip registers. In an interrupt-handling
routine, for example, if it is known that the flag is set to 1, it is not necessary to read the flag
ahead of time.

2.7 Addressing Modes and Effective Address Calculation

2.7.1 Addressing Modes

The H8/300H CPU supports the eight addressing modes listed in table 2-11. Each instruction
uses a subset of these addressing modes. Arithmetic and logic instructions can use the register
direct and immediate modes. Data transfer instructions can use all addressing modes except
program-counter relative and memory indirect. Bit manipulation instructions use register direct,
register indirect, or absolute (@aa:8) addressing mode to specify an operand, and register direct
(BSET, BCLR, BNOT, and BTST instructions) or immediate (3-bit) addressing mode to specify
a bit number in the operand.
op
rn
rn
EA (disp)
cc EA (disp)
Figure 2-9 Instruction Formats
NOP, RTS, etc.
rm
ADD.B Rn, Rm, etc.
rm
MOV.B @(d:16, Rn), Rm
BRA d:8
39