Interrupt Servicing Operations; Non-Maskable Interrupt Request Acknowledge Operation - NEC mPD780065 Series Preliminary User's Manual

8-bit single-chip microcontrollers
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17.4 Interrupt Servicing Operations

17.4.1 Non-maskable interrupt request acknowledge operation

A non-maskable interrupt request is unconditionally acknowledged even if in an interrupt acknowledge disable
state. It does not undergo interrupt priority control and has highest priority over all other interrupts.
If a non-maskable interrupt request is acknowledged, the contents are saved into the stacks in the order of PSW,
then PC, the IE flag and ISP flag are reset (0), and the contents of the vector table are loaded into PC and branched.
A new non-maskable interrupt request generated during execution of a non-maskable interrupt servicing program
is acknowledged after the current execution of the non-maskable interrupt servicing program is terminated (following
RETI instruction execution) and one main routine instruction is executed. However, if a new non-maskable interrupt
request is generated twice or more during non-maskable interrupt servicing program execution, only one non-
maskable interrupt request is acknowledged after termination of the non-maskable interrupt servicing program
execution. Figures 17-7, 17-8, and 17-9 show the flowchart of the non-maskable interrupt request generation through
acknowledge, acknowledge timing of non-maskable interrupt request, and acknowledge operation at multiple non-
maskable interrupt request generation, respectively.
CHAPTER 17 INTERRUPT FUNCTIONS
Preliminary User's Manual U13420EJ2V0UM00
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