Interrupt Servicing Operations; Maskable Interrupt Acknowledgment - NEC 78K0R/KE3 User Manual

16-bit single-chip microcontrollers
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15.4 Interrupt Servicing Operations

15.4.1 Maskable interrupt acknowledgment

A maskable interrupt becomes acknowledgeable when the interrupt request flag is set to 1 and the mask (MK) flag
corresponding to that interrupt request is cleared to 0. A vectored interrupt request is acknowledged if interrupts are
in the interrupt enabled state (when the IE flag is set to 1).
acknowledged during servicing of a higher priority interrupt request.
The times from generation of a maskable interrupt request until vectored interrupt servicing is performed are listed
in Table 15-4 below.
For the interrupt request acknowledgment timing, see Figures 15-8 and 15-9.
Table 15-4. Time from Generation of Maskable Interrupt Until Servicing
Servicing time
Note If an interrupt request is generated just before the RET instruction, the wait time becomes longer.
Remark 1 clock: 1/f
CLK
If two or more maskable interrupt requests are generated simultaneously, the request with a higher priority level
specified in the priority specification flag is acknowledged first. If two or more interrupts requests have the same
priority level, the request with the highest default priority is acknowledged first.
An interrupt request that is held pending is acknowledged when it becomes acknowledgeable.
Figure 15-7 shows the interrupt request acknowledgment algorithm.
If a maskable interrupt request is acknowledged, the contents are saved into the stacks in the order of PSW, then
PC, the IE flag is reset (0), and the contents of the priority specification flag corresponding to the acknowledged
interrupt are transferred to the ISP1 and ISP0 flags. The vector table data determined for each interrupt request is the
loaded into the PC and branched.
Restoring from an interrupt is possible by using the RETI instruction.
CHAPTER 15 INTERRUPT FUNCTIONS
Minimum Time
9 clocks
(f
: CPU clock)
CLK
User's Manual U17854EJ9V0UD
However, a low-priority interrupt request is not
Note
Maximum Time
14 clocks
591

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