Transfer Modes - Epson S1C88655 Technical Manual

Cmos 8-bit single chip microcomputer
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11 SERIAL INTERFACE

11.3 Transfer Modes

There are four transfer modes for the serial inter-
face and mode selection is made by setting the two
bits of the mode selection registers SMDx0 and
SMDx1 as shown in the table below.
Table 11.3.1 Transfer modes
SMDx1
SMDx0
1
1
1
0
0
1
0
0
Table 11.3.2 Terminal settings corresponding
to each transfer mode
Mode
Asynchronous 8-bit
Asynchronous 7-bit
Clock synchronous slave
Clock synchronous master
At initial reset, transfer mode is set to clock syn-
chronous master mode.
Clock synchronous master mode
In this mode, the internal clock is utilized as a
synchronous clock for the built-in shift registers,
and clock synchronous 8-bit serial transfers can
be performed with this serial interface as the
master.
The synchronous clock is also output from the
___________
SCLKx terminal which enables control of the
external (slave side) serial I/O device. Since the
___________
SRDYx terminal is not utilized in this mode, it
can be used as an I/O port.
Figure 11.3.1(a) shows the connection example
of input/output terminals in the clock
synchronous master mode.
Clock synchronous slave mode
In this mode, a synchronous clock from the
external (master side) serial input/output
device is utilized and clock synchronous 8-bit
serial transfers can be performed with this serial
interface as the slave.
The synchronous clock is input to the SCLKx
terminal and is utilized by this interface as the
synchronous clock.
___________
Furthermore, the SRDYx signal indicating the
transmit-receive ready status is output from the
___________
SRDYx terminal in accordance with the serial
interface operating status.
In the slave mode, the settings for registers
SCSx0 and SCSx1 used to select the clock source
are invalid.
Figure 11.3.1(b) shows the connection example
of input/output terminals in the clock
synchronous slave mode.
74
Mode
Asynchronous 8-bit
Asynchronous 7-bit
Clock synchronous slave
Clock synchronous master
SINx
SOUTx SCLKx SRDYx
Input
Output
P12/P16
P13/P17
Input
Output
P12/P16
P13/P17
Input
Output
Input
Output
Input
Output
Output
P13/P17
___________
Asynchronous 7-bit mode
In this mode, asynchronous 7-bit transfer can be
performed. Parity check during data reception
and addition of parity bit (odd/even/none)
during transmitting can be specified and data
processed in 7 bits with or without parity. Since
this mode employs the internal clock, the
___________
SCLKx terminal is not used. Furthermore, since
___________
the SRDYx terminal is not utilized either, both
of these terminals can be used as I/O ports.
Figure 11.3.1(c) shows the connection example
of input/output terminals in the asynchronous
mode.
Asynchronous 8-bit mode
In this mode, asynchronous 8-bit transfer can be
performed. Parity check during data reception
and addition of parity bit (odd/even/none)
during transmitting can be specified and data
processed in 8 bits with or without parity. Since
this mode employs the internal clock, the
___________
SCLKx terminal is not used. Furthermore, since
___________
the SRDYx terminal is not utilized either, both
of these terminals can be used as I/O ports.
Figure 11.3.1(c) shows the connection example
of input/output terminals in the asynchronous
mode.
S1C88655
SINx(P10/P14)
SOUTx(P11/P15)
SCLKx(P12/P16)
Pxx port (input)
(a) Clock synchronous master mode
S1C88655
SINx(P10/P14)
SOUTx(P11/P15)
SCLKx(P12/P16)
SRDYx(P13/P17)
(b) Clock synchronous slave mode
S1C88655
SINx(P10/P14)
SOUTx(P11/P15)
(c) Asynchronous 7-bit/8-bit mode
Fig. 11.3.1 Connection examples of serial interface I/O terminals
EPSON
External
serial device
Data input
Data output
CLOCK input
READY output
External
serial device
Data input
Data output
CLOCK output
READY input
External
serial device
Data input
Data output
S1C88655 TECHNICAL MANUAL

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