Figure 6-6 Block Diagram - RCA RDR9000 Service Manual

Service Manual
Control Head
Transmitter Circuit
19.2 MHz
External
19.2 MHz
Receiver Circuit
19.2 MHz
Block Diagram (Clock Section)
PLL
SKY72310
19.2 MHz <2V
Filter
19.2 MHz 0.8-1V
Buffer
TCXO
19.2 MHz 3.3V
SPDT
19.2 MHz 0.8-1V
Clock Select Control
PLL
19.2 MHz <3.3V
SKY72310
Filter
19.2 MHz <2V
19.2 MHz 0.8~1V
Buffer
Filter
TCXO
19.2 MHz 3.3V
12 MHz
12 MHz
CLK
Crystal
LPC1774
32768 Hz
32768 Hz
32K
Crystal
19.2 MHz <1.2V
Filter CLK
OMAP-L138
32768 Hz
32768 Hz
32K
Crystal
IF Processor
AD9864
19.2 MHz <1.2V
Filter CLK
OMAP-L138
32768 Hz
32768 Hz
32K
Crystal

Figure 6-6 Block Diagram

44
6. UHF1 (400-470 MHz) Information
Noise Reduction IC
BR261W26
Exit CLK
19.2 MHz
Audio Codec
CLKOUT MCLK
TLV320AIC29
Noise Reduction IC
BR261W26
Exit CLK
19.2 MHz
Audio Codec
CLKOUT MCLK
TLV320AIC29