Baseband Block Diagram; Figure 3-2 Baseband Block Diagram - RCA RDR9000 Service Manual

Service Manual

3.2.2 Baseband Block Diagram

MOD_XO
DAC IF processor
TLV5614 AD9864
SSI SSI
To FGU VC-TCXO
To AD9864 Amp Filter
19.2 MHz
CLK
McBSP1
32768 Hz
32768 Hz
RTC
Crystal
RESET /RESET
NOR Flash RST OUT
/RESETOUT
IO Expand
JTAG
JTAG
MDDR DDR
OMAPL138BZWTA3
NOR Flash
EMA
512 Mbit
The overall control scheme for the repeater unit is described as follows:
 ARM Processor: The ARM processor, being the core of the system control, controls
power supply and paths for various modules in the repeater unit, configures data for
some chips, parses and inserts software protocol stacks, and encodes/decodes channels.
In addition, this processor controls TCP/IP PHY modules and MCU for the control head.
 DSP Processor: The DSP processor handles baseband signals, encodes/decodes voices,
and modulates/demodulates digital/analog signals.
SPI
From Control Head MCU
Expand
IDC10 3GPIO
Fan
FAN
Driver
IDC10
RF Unit
PLL
SKY72310
RX
SPI CTRL
DB26
EXT
Ext_Mic Switch
PWR
SPI1 GPIO BR261
ADC
MCASP CODEC
(ACLKX) AXR8/15
IIS
McBSP0
GPIO

Figure 3-2 Baseband Block Diagram

DB9
For GPS
DB15
Rear Board
For BS Application
DB26
Ext_Mic2
Slot1_Audio
EXT
Slot2/RX_Audio IO Expand
Ext_Mic1 USB0
PWR
PA_Audio (Programmable IN/OUT)
IDC26
RS232
RS232
DB26
Handset_Audio
EXT Control IO
RX_Audio USB0
UART2 Ext_Mic UART1
PWR
PA_Audio
INT_SPK
Audio
PA
Switch
USB Switch
NX3DV42GU
Audio Filter,
IO Expand
Amp, Switch
(74AHC594)
Headset
BR261 ADC
Driver
CODEC
IIS AXR8/15
CP_IN
SPDT
OMAP_SYNC
USB
Switch
USB
LED Indicator
Control Head
8
3. Baseband Section
RJ45
PTT1
PTT2
Transformer
RF Unit
PLL
DAC
Ethernet TX/RX
CTRL
PTT
PHY
MAC
GPIO SPI1 McBSP1
GPIO
RMII
UART1
USB0
OMAP-L138B
ZWTA3
GPIO
MCASP
(ACLKX)
EPWM0B
UART2
McBSP0
UART0
GPIO
USB
UARTA
MAX803 RST
LPC1774FBD208
GPIOs
To Rear
DB15, DB9
Key
GPIO SPI1/2
Encoder Switch EMC
IDC10
Backlight Control
LCD TFT2.4 NOR
SDRAM
Flash
INT SPK Backlight
240*320
19.2 MHz CLK
From GPS Board
SMA
MOD_XO
VC-TCXO
TS5A3159 To FGU
Amp Filter
19.2 MHz
CLK
32768 Hz
32768 Hz
RTC
Crystal
WD_RST
/RESET RESET
RST OUT NOR Flash
/RESETOUT
IO Expand
JTAG
JTAG
DDR MDDR
NOR Flash
EMA
512 Mbit