Clock; Figure 3- 5 Diagram Of Clock Distribution - RCA RDR9000 Service Manual

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3.2.6 Clock

The system needs three clocks for operation: system clock, clock for RTC on OMAP-L138,
and clock for the control head MCU. The system clock is provided by 19.2 MHz TCXO or an
externally calibrated 19.2 MHz clock source. Clock for RTC on OMAP-L138 is generated by
the 32.768 kHz crystal oscillator. The clock used by the MCU for the control head is provided
from the 12 MHz crystal oscillator. Diagram of clock distribution is shown in Figure 3-5.
Control Head
PLL
Transmitter Circuit
SKY72310
19.2 MHz <2V
Filter
19.2 MHz 0.8-1V
19.2 MHz
TCXO
SPDT
19.2 MHz 0.8-1V
External
19.2 MHz
Clock Select Control
PLL
Receiver Circuit
SKY72310
19.2 MHz <2V
19.2 MHz 0.8~1V
19.2 MHz
Filter
TCXO
12 MHz
Crystal
32768 Hz
32768 Hz
Crystal
19.2 MHz <1.2V
Buffer
Filter
19.2 MHz 3.3V
32768 Hz
32768 Hz
Crystal
19.2 MHz <3.3V
IF Processor
Filter
AD9864
19.2 MHz <1.2V
Buffer
Filter
19.2 MHz 3.3V
32768 Hz
32768 Hz
Crystal

Figure 3- 5 Diagram of Clock Distribution

12 MHz
CLK
LPC1774
32K
CLK
OMAP-L138
32K
CLK
OMAP-L138
32K
12
3. Baseband Section
Noise Reduction IC
BR261W26
Exit CLK
19.2 MHz
Audio Codec
CLKOUT
MCLK
TLV320AIC29
Noise Reduction IC
BR261W26
Exit CLK
19.2 MHz
Audio Codec
CLKOUT
MCLK
TLV320AIC29

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