Figure 7-6 Block Diagram - RCA RDR9000 Service Manual

Service Manual
Control Head
Transmitter Circuit
19.2 MHz 0.8-1V
19.2 MHz
TCXO
19.2 MHz 0.8-1V
External
19.2 MHz
Receiver Circuit
19.2 MHz 0.8~1V
19.2 MHz
TCXO
Block Diagram (Clock Section)
12 MHz
Crystal
32768 Hz
Crystal
PLL
SKY72310
19.2 MHz <2V
Filter
Buffer Filter
19.2 MHz 3.3V
SPDT
Clock Select Control
32768 Hz
Crystal
PLL
19.2 MHz <3.3V
IF Processor
SKY72310
Filter
AD9864
19.2 MHz <2V
Filter Buffer Filter
19.2 MHz 3.3V
32768 Hz
Crystal

Figure 7-6 Block Diagram

12 MHz
CLK
LPC1774
32768 Hz
32K
19.2 MHz <1.2V
CLK
OMAP-L138
32768 Hz
32K
19.2 MHz <1.2V
CLK
OMAP-L138
32768 Hz
32K
145
7. UHF3 (350-400 MHz) Information
Noise Reduction IC
BR261W26
Exit CLK
19.2 MHz
Audio Codec
CLKOUT
MCLK
TLV320AIC29
Noise Reduction IC
BR261W26
Exit CLK
19.2 MHz
Audio Codec
CLKOUT
MCLK
TLV320AIC29