Mitsubishi Q00JCPU User Manual
  1. Manuals
  2. Brands
  3. Mitsubishi Manuals
  4. Controller
  5. Q00JCPU
  6. User manual

Mitsubishi Q00JCPU User Manual

Q series, logic
Hide thumbs Also See for Q00JCPU:
1
2
3
4
5
6
7
8
9
10
11
Table Of Contents
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
Table of Contents

Advertisement

Quick Links

See also: User Manual , Manual
QCPU
User's Manual
(Function Explanation,
Program Fundamentals)
Mitsubishi Programmable
Logic Controller
Q00JCPU
Q00CPU
Q01CPU
Q02CPU
Q02HCPU
Q06HCPU
Q12HCPU
Q25HCPU
Q12PHCPU
Q25PHCPU
Q12PRHCPU
Q25PRHCPU

Advertisement

Table of Contents
loading

Related Manuals for Mitsubishi Q00JCPU

Summary of Contents for Mitsubishi Q00JCPU

  • Page 1 QCPU User's Manual (Function Explanation, Program Fundamentals) Q00JCPU Q12HCPU Q00CPU Q25HCPU Mitsubishi Programmable Q01CPU Q12PHCPU Logic Controller Q02CPU Q25PHCPU Q02HCPU Q12PRHCPU Q06HCPU Q25PRHCPU...

  • Page 3: Safety Precautions

    SAFETY PRECAUTIONS (Always read these instructions before using this equipment.) Before using this product, please read this manual and the relevant manuals introduced in this manual carefully and pay full attention to safety to handle the product correctly. In this manual, the safety instructions are ranked as "DANGER" and "CAUTION". Indicates that incorrect handling may cause hazardous conditions, DANGER resulting in death or severe injury.
  • Page 4 [Design Precautions] DANGER Install a safety circuit external to the PLC that keeps the entire system safe even when there are problems with the external power supply or the PLC module. Otherwise, trouble could result from erroneous output or erroneous operation. (1) Outside the PLC, construct mechanical damage preventing interlock circuits such as emergency stop, protective circuits, positioning upper and lower limits switches and interlocking forward/ reverse operations.
  • Page 5 [Design Precautions] DANGER When overcurrent which exceeds the rating or caused by short-circuited load flows in the output module for a long time, it may cause smoke or fire. To prevent this, configure an external safety circuit, such as fuse. Build a circuit that turns on the external power supply when the PLC main module power is turned If the external power supply is turned on first, it could result in erroneous output or erroneous operation.
  • Page 6 [Installation Precautions] CAUTION Use the PLC in an environment that meets the general specifications contained in QCPU User's Manual (Hardware Design, Maintenance and Inspection). Using this PLC in an environment outside the range of the general specifications could result in electric shock, fire, erroneous operation, and damage to or deterioration of the product.
  • Page 7 [Wiring Precautions] DANGER Completely turn off the externally supplied power used in the system when installing or placing wiring. Not completely turning off all power could result in electric shock or damage to the product. When turning on the power supply or operating the module after installation or wiring work, be sure that the module's terminal covers are correctly attached.
  • Page 8 [Startup and Maintenance Precautions] DANGER Do not touch the terminals while power is on. Doing so could cause shock or erroneous operation. Correctly connect the battery. Also, do not charge, disassemble, heat, place in fire, short circuit, or solder the battery. Mishandling of battery can cause overheating or cracks which could result in injury and fires.
  • Page 9 [Startup and Maintenance Precautions] CAUTION The online operations conducted for the CPU module being operated, connecting the peripheral device (especially, when changing data or operation status), shall be conducted after the manual has been carefully read and a sufficient check of safety has been conducted. Operation mistakes could cause damage or problems with of the module.
  • Page 10 [Disposal Precautions] CAUTION When disposing of this product, treat it as industrial waste. [Transportation Precautions] CAUTION When transporting lithium batteries, make sure to treat them based on the transport regulations. (Refer to Appendix4 for details of the controlled models.)

  • Page 11: Revisions

    This manual confers no industrial property rights or any rights of any other kind, nor does it confer any patent licenses. Mitsubishi Electric Corporation cannot be held responsible for any problems involving industrial property rights which may occur as a result of using the contents noted in this manual.

  • Page 12: Table Of Contents

    INTRODUCTION Thank you for choosing the Mitsubishi MELSEC-Q Series of General Purpose Programmable Controllers. Before using the equipment, please read this manual carefully to develop full familiarity with the functions and performance of the Q series PLC you have purchased, so as to ensure correct use.
  • Page 13 3.4.1 Initial processing••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 3 - 58 3.4.2 I/O refresh (I/O module refresh processing) ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 3 - 59 3.4.3 Automatic refresh of the intelligent function module•••••••••••••••••••••••••••••••••••••••••••••••••• 3 - 59 3.4.4 END processing ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 3 - 60 RUN, STOP, PAUSE Operation Processing •••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 3 - 61 Operation Processing during Momentary Power Failure ••••••••••••••••••••••••••••••••••••••••••••••••••...
  • Page 14 5.2.5 Memory card ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 5 - 29 5.2.6 Write to standard ROM and Flash card by GX Developer •••••••••••••••••••••••••••••••••••••••••• 5 - 34 5.2.7 Automatic all data write from memory card to standard ROM •••••••••••••••••••••••••••••••••••••• 5 - 39 5.2.8 Execution of standard ROM/memory card programs (boot run) ••••••••••••••••••••••••••••••••••• 5 - 43 5.2.9 Details of written files •••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••...
  • Page 15 6.17 Self-diagnostics Function•••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••6 - 100 6.17.1 Interrupt due to error occurrence••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••6 - 111 6.17.2 LED display at the time of error occurrence•••••••••••••••••••••••••••••••••••••••••••••••••••••••••••6 - 113 6.17.3 Error Clear •••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••6 - 113 6.18 Error History ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••6 - 115 6.18.1 Basic model QCPU ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••6 - 115 6.18.2 High Performance model QCPU, Process CPU, Redundant CPU •••••••••••••••••••••••••••••••6 - 116 6.19 System Protect •••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••6 - 117 6.19.1 Password registration •••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••6 - 118...
  • Page 16 Internal User Devices ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••9 - 5 9.2.1 Input (X) •••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••9 - 8 9.2.2 Output (Y)••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 9 - 10 9.2.3 Internal relay (M) •••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 9 - 11 9.2.4 Latch relay (L)•••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 9 - 12 9.2.5 Annunciator (F) •••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 9 - 14 9.2.6 Edge relay (V)••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••...
  • Page 17 9.13 Convenient Usage of Devices •••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 9 - 98 9.13.1 Global devices and local devices •••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 9 - 98 CHAPTER10 CPU MODULE PROCESSING TIME 10 - 1 to 10 - 21 10.1 Scan Time •••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 10 - 1 10.1.1 Scan time structure ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 10 - 1 10.1.2 Time required for each processing included in scan time •••••••••••••••••••••••••••••••••••••••••••...

  • Page 18: Contents

    (Related manual)....QCPU User's Manual (Hardware Design, Maintenance and Inspection) CONTENTS CHAPTER1 OVERVIEW Features CHAPTER2 SYSTEM CONFIGURATION System Configuration 2.1.1 System Configuration for Single CPU System 2.1.2 System Configuration for Bus connection of GOT 2.1.3 Configuration of peripheral devices 2.1.4 Applicable Devices and Software 2.1.5 Precaution on system configuration Confirming Serial No.
  • Page 19 Standards relevant to the EMC Directive 9.1.2 Installation instructions for EMC Directive 9.1.3 Cables 9.1.4 Power Supply Module and Q00JCPU's Power Supply Part 9.1.5 When Using MELSEC-A Series Modules 9.1.6 Others Requirement to Conform to the Low Voltage Directive 9.2.1 Standard applied for MELSEC-Q series PLC 9.2.2...
  • Page 20 10.5 Connection and Disconnection of Extension Cable 10.6 Wiring 10.6.1 The precautions on the wiring 10.6.2 Connecting to the power supply module CHAPTER11 MAINTENANCE AND INSPECTION 11.1 Daily Inspection 11.2 Periodic Inspection 11.3 Battery Life and Replacement Procedure 11.3.1 Battery lives of CPU modules 11.3.2 Replacement Procedure of the CPU Module Battery 11.3.3...
  • Page 21 12.5 I/O Module Troubleshooting 12.5.1 Input circuit troubleshooting 12.5.2 Output Circuit Troubleshooting 12.6 Special Relay List 12.7 Special Register List APPENDICES Appendix 1 External Dimensions Appendix 1.1 CPU module Appendix 1.2 Power supply module Appendix 1.3 Main base unit Appendix 1.4 Extension base unit Appendix 1.5 Extension cable Appendix 1.6 Tracking cable Appendix 2 Comparison...

  • Page 22: About Manuals

    ABOUT MANUALS The following manuals are also related to this product. In necessary, order them by quoting the details in the tables below. Related Manuals (1) Common to CPU modules The following table indicates the related manuals common to the Basic model QCPU, High Performance model QCPU, Process CPU and Redundant CPU.
  • Page 23 (2) Basic model QCPU The following table indicates the related manuals of the Basic model QCPU other than the manuals indicated in "(1) Common to CPU modules". Manual Number Manual Name (Model Code) QCPU (Q Mode)/QnACPU Programming Manual (PID Control Instructions) SH-080040 This manual describes the dedicated instructions used to exercise PID control.
  • Page 24 (4) Process CPU The following table indicates the related manuals of the Process CPU other than the manuals indicated in "(1) Common to CPU modules". Manual Number Manual Name (Model Code) QnPHCPU/QnPRHCPU Programming Manual (Process Control Instructions) SH-080316E This manual describes the programming procedures, device names, and other items necessary to implement (13JF67) PID control using process control instructions.

  • Page 25: How To See This Manual Is Organized

    HOW TO SEE THIS MANUAL IS ORGANIZED CPU modules requiring Reference destination Chapter heading precautions A reference destination or The index on the right side of the page The CPU modules requiring precautions reference manual is marked shows the chapter of the open page at a are shown as icons.
  • Page 26 In addition, this manual provides the following explanations. POINT Explains the matters to be especially noted, the functions and others related to the description. Remark Provides the reference destination related to the description on that page and the convenient information. - 24...

  • Page 27: How To Use This Manual

    HOW TO USE THIS MANUAL This manual is prepared for users to understand memory map, functions, programs and devices of the CPU module when you use Q Series PLCs. The manual is classified roughly into three sections as shown below. 1) Chapters 1 Describe the outline of the CPU module.

  • Page 28: Generic Terms And Abbreviations

    QCPU User's Manual (Hardware Design, Maintenance and Inspection). General name for Q33B, Q35B, Q38B and Q312B main base units on which CPU module (except Q00JCPU), Q series power supply module, I/O module and intelligent Q3 B function module can be mounted.
  • Page 29 Generic Term/Abbreviation Description General name for QC05B, QC06B, QC12B, QC30B, QC50B, QC100B extension Extension cable cables. Tracking cable General name for QC10TR and QC30TR tracking cable for Redundant CPU. Q series power supply module General name for Q61P-A1, Q61P-A2, Q62P, Q63P and Q64P power supply modules. Slim type power supply module General name for Q61SP slim type power supply module.

  • Page 30: Chapter1 Overview

    The CPU modules described in this manual are as shown in Table1.1. Table1.1 List of CPU modules corresponding to the description of this manual CPU module Model name Basic model QCPU Q00JCPU, Q00CPU, Q01CPU Q02CPU, Q02HCPU, Q06HCPU, Q12HCPU, High Performance model QCPU Q25HCPU Process CPU...
  • Page 31 OVERVIEW (2) List of Q Series CPU Module manuals The Q series CPU module manuals are as shown below. For details such as manual numbers, refer to "About Manuals" in this manual. (a) Basic model QCPU Table1.2 List of user's manuals of basic model QCPU Maintenance Hardware Program...
  • Page 32 OVERVIEW Table1.3 List of programming manuals of basic model QCPU Process PID Control Structured Common Control MELSAP-L Text Instructions Instructions Instruction QCPU (Q mode)/ QCPU (Q mode)/ QnPHCPU/ QnACPU QnACPU QnPRHCPU QCPU (Q mode)/ QCPU (Q mode) QCPU (Q mode) Programming Programming Programming...
  • Page 33 OVERVIEW (b) High Performance Model QCPU Table1.4 List of user's manuals of high performance model QCPU Maintenance Hardware Program Multi CPU Redundant Fundamentals System System Inspection (Packed) QCPU User's QCPU User's QCPU (Q mode) Manual (Hardware Manual (Function QCPU User's QnPRHCPU User's Purpose CPU Module User's...
  • Page 34 OVERVIEW Table1.5 List of programming manuals of high performance model QCPU Process PID Control Structured Common Control MELSAP-L Instructions Instructions Text Instruction QCPU (Q mode)/ QCPU (Q mode)/ QnPHCPU/ QnACPU QnACPU QnPRHCPU QCPU (Q mode)/ QCPU (Q mode) QCPU (Q mode) Programming Programming Programming...
  • Page 35 OVERVIEW (c) Process CPU Table1.6 List of user's manuals of process CPU Maintenance Hardware Program Multi CPU Redundant Fundamentals System System Inspection (Packed) QCPU User's QCPU User's QCPU (Q mode) Manual (Hardware Manual (Function QCPU User's QnPRHCPU User's Purpose CPU Module User's Design, Explanation, Manual (Multiple...
  • Page 36 OVERVIEW Table1.7 List of programming manuals of process CPU Process PID Control Structured Common Control MELSAP-L Instructions Text Instructions Instruction QCPU (Q mode)/ QCPU (Q mode)/ QnPHCPU/ QnACPU QnACPU QnPRHCPU QCPU (Q mode)/ QCPU (Q mode) QCPU (Q mode) Programming Programming Programming QnACPU...
  • Page 37 OVERVIEW (d) Redundant CPU Table1.8 List of user's manual of redundant CPU Maintenance Hardware Program Multi CPU Redundant Fundamentals System System Inspection (Packed) QCPU User's QCPU User's QCPU (Q mode) Manual (Hardware Manual (Function QCPU User's QnPRHCPU User's Purpose CPU Module User's Design, Explanation, Manual (Multiple...
  • Page 38 OVERVIEW Table1.9 List of programming manuals of redundant CPU Process Structured PID Control Common Control MELSAP-L Instructions Text Instructions Instruction QCPU (Q mode)/ QCPU (Q mode)/ QnPHCPU/ QCPU (Q mode) QnACPU QnACPU QnPRHCPU QCPU (Q mode)/ QCPU (Q mode) Programming Programming Programming Programming...

  • Page 39: Features

    OVERVIEW 1.1 Features This section explains the features of the CPU modules. 1.1.1 Features of Basic model QCPU The features specific to the Basic model QCPU are described below. (1) Cost performance optimum for small-scaled system The Basic model QCPU is a module targeted for a small-scaled system and optimum for controlling a simple, compact system.

  • Page 40: Features Of High Performance Model Qcpu

    OVERVIEW 1.1.2 Features of High Performance model QCPU The features specific to the High Performance model QCPU are described below. (1) High performance and large capacity The High Performance model QCPU is a module targeted for small-scaled to large- scaled systems and capable of high-speed massive data processing. The High Performance model QCPU realizes construction of the optimum and high- performance system.
  • Page 41 OVERVIEW (2) AnS series I/O modules and special function modules are available The QA1S65B/QA1S68B type extension base units allow the High Performance model QCPU to use the AnS series I/O modules and special function modules. Remark Refer to 3.2 for upgraded functions added to the High Performance model QCPU. 1.1 Features - 12 1.1.2 Features of High Performance model QCPU...

  • Page 42: Features Of Process Cpu

    OVERVIEW 1.1.3 Features of Process CPU The features specific to the Process CPU are described below. (1) Additional 52 process control functions Fifty-two instructions supporting high-leveled process controls have been added to the CPU based on the High Performance model QCPU. Refer to the following manual for details of the added instructions.
  • Page 43 OVERVIEW (4) Module can be replaced online (Online module change) When a module becomes faulty, it can be replaced without the system being stopped. Modules available for this are the Q series I/O modules, and the A/D converter modules, D/A converter modules, temperature input modules, temperature control modules and pulse input modules of function version C.

  • Page 44: Features Of Redundant Cpu

    OVERVIEW 1.1.4 Features of Redundant CPU The features specific to the Redundant CPU are described below. (1) Supporting redundant system in addition to the Process CPU functions (a) Redundant system using Redundant CPU Using the Redundant CPUs, the whole system including a base unit, a power supply module and a CPU module (Redundant CPU) can be doubled.
  • Page 45 OVERVIEW (b) Redundant power supply system Using the redundant main base unit (Q3 RB) and redundant power supply module (Q6 RB) on the remote I/O station side, the remote I/O station side power supply can be made redundant. This enables the power supply module to be changed without stopping the system if the remote I/O station side power supply module becomes faulty.

  • Page 46: Program Storage And Operation

    * 2 : The standard RAM is a memory used for the file registers. * 3 : The intelligent function module parameters set by GX Configurator are included. * 4 : The Q00JCPU does not have the standard RAM. The file registers are unavailable.
  • Page 47 OVERVIEW 2) High Performance model QCPU, Process CPU, Redundant CPU Program memory Parameter Program Parameter Program Device comments Device initial value Device comments Device initial value File register Local devices Standard ROM Sampling Parameter Program Failure history Device comments Device initial value Parameter Program Standard RAM...
  • Page 48 OVERVIEW Note1.3 (c) Execution of program stored in standard ROM/memory card Basic Programs and data can also be stored into the standard ROM/memory card. Note1.3 The programs stored in the standard ROM/memory card can be booted (read) to the program memory and executed when the PLC is powered ON or the CPU module is reset.Note3 By storing programs and data into the standard ROM/memory card, they can be...
  • Page 49 OVERVIEW (2) Structured programs CPU module programs can be structured. A program can be created according to processes and functions by structuring it. As program structuring, structuring in the same program ( (2)(a) in this section) and file-divided structuring ( (2)(b) in this section) are available.
  • Page 50 OVERVIEW Basic Note1.4 (b) File-divided structuring Programs are stored in file format. *1 Note1.4 Changing the file name allows the CPU module to store multiple programs.Note4 * 1 : The program storage destination changes depending on the CPU module. CHAPTER 5) Multiple program writing is enabled by using different file names.
  • Page 51 OVERVIEW 2) When program is divided according to processes Program memory / Standard ROM / Memory card Ship in Program A Manufacturing Program B Program A to D are executed in Split by process sequence. 2 Program C Assembly Ship out Program D * 1 : The processings performed according to the processes can further be managed separately according to the functions.

  • Page 52: Devices And Instructions Convenient For Programming

    OVERVIEW 1.3 Devices and Instructions Convenient for Programming The CPU module has devices and instructions convenient for program creation. The main devices and instructions are outlined below. (1) Flexible device designation The Q series CPU modules allow devices to be specified flexibly. (a) Word device bits are handled as contacts/coils By specifying the bit of the word device, each bit of the word device can be handled as a contact/coil.
  • Page 53 OVERVIEW (c) Input need not be pulsed by use of differential contact An input need not be pulsed by use of a differential contact( Differential contact Y100 Y100 Y100 ON at leading Y100 edge of X0 Diagram 1.19 Use of differential contact (d) Direct access to intelligent function module buffer memory The intelligent function module buffer memory can be handled as devices for programming.
  • Page 54 OVERVIEW (2) Structural description of programs Using the index registers and edge relays, programs including pulse processing can be structured easily. ( Section 9.2.6) X0 X1 PLS M0 FOR n X10 X11 PLS M10 X0Z0 X1Z0 V0Z1 Y8Z2 n pieces of similar programs can be described at one time! X170 X171...
  • Page 55 OVERVIEW (b) High-speed processing of massive data The data processing instructions, such as the table processing instruction, have been reinforced to enable high-speed processing of massive data. FINSP FIF0 table FIF0 table Insertion Inserting source position Insertion designation Instruction for data insertion at table Diagram 1.24 Data processing by table processing instruction (4) Flexible management of subroutine program...
  • Page 56 OVERVIEW (b) Subroutine call instructions with arguments A subroutine program called several time can be created easily by the subroutine call instructions with arguments. Main routine program Argument designation CALLP K4X0 Argument from FD2 Argument to FD1 Argument to FD0 Sub routine program designation Argument designation...

  • Page 57: How To Check The Serial No. And Function Version

    OVERVIEW 1.4 How to Check the Serial No. and Function Version The serial No. and function version of the CPU module can be checked on the rating plate or in the system monitor of GX Developer. (1) Checking on rating plate The rating plate is on the side face of the CPU module.

  • Page 58: Chapter2 Performance Specification

    PERFORMANCE SPECIFICATION CHAPTER2 PERFORMANCE SPECIFICATION The table below shows the performance specifications of the CPU module. Table2.1 Performance Specification Basic model QCPU High Performance model QCPU Item Q00JCPU Q00CPU Q01CPU Q02CPU Q02HCPU Q06HCPU Control method Repetitive operation of stored program...
  • Page 59 PERFORMANCE SPECIFICATION High Performance model QCPU Process CPU Redundant CPU Remark Q12HCPU Q25HCPU Q12PHCPU Q25PHCPU Q12PRHCPU Q25PRHCPU Repetitive operation of stored program ---- Direct I/O is possible by direct I/O specification Refresh mode , DY Relay symbol language, logic symbolic language,MELSAP3 (SFC), MELSAP-L, Function block, ---- structured text (ST) Use PX Developer for...
  • Page 60 PERFORMANCE SPECIFICATION Table2.1 Performance Specification Basic model QCPU High Performance model QCPU Item Q00JCPU Q00CPU Q01CPU Q02CPU Q02HCPU Q06HCPU Program memory Memory card (RAM) ---- Memory Flash card ---- card Maximum ATA card ---- (ROM) number of stored files Standard RAM...
  • Page 61 PERFORMANCE SPECIFICATION High Performance model QCPU Process CPU Redundant CPU Remark Q12HCPU Q25HCPU Q12PHCPU Q25PHCPU Q12PRHCPU Q25PRHCPU Section 5.1.1,Section 5.2.1 Section 5.2.4 Section 5.2.4 Section 5.2.4 Section 5.1.3, Section 5.2.3 Section 5.1.2, Section 5.2.2 Max. 100000 times ---- Number of devices usable on 8192 points(X/Y0 to 1FFF) program Number of points accesible to...
  • Page 62 PERFORMANCE SPECIFICATION Table2.1 Performance Specification Basic model QCPU High Performance model QCPU Item Q00JCPU Q00CPU Q01CPU Q02CPU Q02HCPU Q06HCPU Internal relay [M] Default 8192 points (M0 to 8191) (changeable) Latch relay [L] Default 2048 points (L0 to 2047) (changeable) Default 8192 points (L0 to 8191) (changeable)
  • Page 63 PERFORMANCE SPECIFICATION High Performance model QCPU Process CPU Redundant CPU Remark Q12HCPU Q25HCPU Q12PHCPU Q25PHCPU Q12PRHCPU Q25PRHCPU Default 8192 points (M0 to 8191) (changeable) Default 8192 points (L0 to 8191) (changeable) Default 8192points (B0 to 1FFF) (changeable) Default 2048 points (T0 to 2047) (for low / high speed timer) (changeable) Use the instruction to switch between the low speed timer and high speed timer.
  • Page 64 PERFORMANCE SPECIFICATION Table2.1 Performance Specification Basic model QCPU High Performance model QCPU Item Q00JCPU Q00CPU Q01CPU Q02CPU Q02HCPU Q06HCPU Link special relay [SB] 1024 points(SB0 to 3FF) 2048 points(SB0 to 7FF) Link special register [SW] 1024 points(SW0 to 3FF) 2048 points(SW0 to 7FF)
  • Page 65 PERFORMANCE SPECIFICATION High Performance model QCPU Process CPU Redundant CPU Remark Q12HCPU Q25HCPU Q12PHCPU Q25PHCPU Q12PRHCPU Q25PRHCPU 2048 points(SB0 to 7FF) 2048 points(SW0 to 7FF) 8192 points(S0 to 8191) 16 points(Z0 to 15) 4096 points (P0 to 4095), set parameter values to select usable range of in-file pointer / shared pointers. 256 points (I0 to 255) The number of device points The specified intervals of the system interrupt pointers I28 to I31 can be set with parameters.

  • Page 66: Chapter3 Sequence Program Configuration And Execution Conditions

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS CHAPTER3 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS As programs that can be executed by the CPU module, there are a sequence program, SFC program and ST program. This manual does not explain the SFC program and ST program. Refer to the following manuals for the SFC program and ST program.
  • Page 67 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (2) Program execution order of High Performance model QCPU, Process CPU or Redundant CPU The High Performance model QCPU, Process CPU or Redundant CPU executes a program in the following order (Diagram 3.2). Initial processing Execution order can be changed.

  • Page 68: Sequence Program

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.1 Sequence Program A sequence program is created using the sequence instructions, basic instructions, application instructions, etc. Sequence instruction K100 Basic instruction BIN K4X10 Application instruction FROM H5 Diagram 3.3 Sequence program Remark Refer to the following manual for the sequence instructions, basic instructions and application instructions.
  • Page 69 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (1) Sequence program description method There are two different methods for describing sequence programs: ladder mode and list mode. (a) Ladder mode The ladder mode is based on the concept of a sequence circuit of relay control. It enables programming in representation close to a sequence circuit.
  • Page 70 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (2) Sequence program operation Program operation is executed sequentially from Step 0 to the END/FEND instruction. In the ladder mode, operation is performed from the left side vertical bus bar to the right end for each ladder block, and from the top rung to the bottom. [Ladder mode] [List mode] From left to right...
  • Page 71 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (3) Sequence program classification • Sequence programs are classified into the following three types. • Main routine program Section 3.1.1 • Subroutine program Section 3.1.2 • Interrupt program Section 3.1.3 Note3.1 Note1 Basic File A Note3.1 Main routine program...

  • Page 72: Main Routine Programs

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.1.1 Main routine programs (1) Definition of main routine program A main routine program is a program from Step 0 to the END/FEND instruction. (2) Execution operation of main routine program When the main routine program is executed, it operates as described below. (a) When only one program is executed The main routine program is executed from Step 0 to the END/FEND instruction, where END processing is performed.
  • Page 73 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS Note3.2 (3) Execution types for main routine programs Basic When multiple programs are to be executed, the following five different execution Note3.2 types can be set to main routine programs depending on the application.Note2 •...

  • Page 74: Subroutine Programs

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.1.2 Subroutine programs (1) Definition of subroutine program A subroutine program is a program section from a pointer (P ) to the REET instruction. The subroutine program is executed only when it is called by a subroutine program call instruction (e.g.
  • Page 75 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (3) Subroutine program management Subroutine programs are created after a main routine program (after the FEND instruction). Subroutine programs can also be managed as a single program. (a) Creating subroutine programs after main routine program 1) Location of creating subroutine programs Create subroutine programs between the FEND and END instructions of the main routine program.
  • Page 76 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 2) Restrictions on creation order When creating multiple subroutine programs, it is not necessary to set the pointer numbers in ascending order. 3) Available pointers Basic Local pointers and common pointers are available for subroutine Note3.5 programs.

  • Page 77: Interrupt Programs

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.1.3 Interrupt programs (1) Definition of interrupt program An interrupt program is a program section from an interrupt pointer (I ) to the IRET instruction. Main routine program Indicates end of main routine FEND program.
  • Page 78 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS POINT 1. A pointer dedicated to the high-speed interrupt function (I49) is available as Basic Process Redundant Note3.7,Note3.8 an interrupt pointer. Note3.7 Note3.7 Note3.7 Note7Note8 High When using I49, do not execute the following: Performance •...
  • Page 79 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (2) Interrupt program management Interrupt programs are created after the main routine program (after the FEND instruction). The interrupt programs can also be managed as a single program. (a) Creating interrupt programs after main routine program 1) Location of creating interrupt programs Create interrupt programs between the FEND and END instructions of the main routine program.
  • Page 80 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS Note3.10 (b) Managing interrupt programs as another program Basic Interrupt programs can be managed as one program (stand-by type program). Note3.10 Section 3.3.4)Note10 (3) Before executing interrupt programs Before executing interrupt programs, execute the following instructions to enable the interrupts.
  • Page 81 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (4) When interrupt factor occurs There are restrictions on interrupt programs depending on the interrupt factor occurrence timing. (a) When interrupt factor occurs before interrupts are enabled The CPU module stores the interrupt factor that has occurred. As soon as interrupts are enabled, the interrupt program corresponding to the stored interrupt factor is executed.
  • Page 82 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (c) When multiple interrupt factors occur simultaneously in interrupt enable status The interrupt programs are executed in the order of descending preferences of their interrupt pointers (I ) .( Section 9.10) The other interrupt programs have to wait until the processing of the interrupt program being executed is completed.
  • Page 83 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 2) Disable interrupt with DI instruction Disable the instructions that may cause inconvenience for the main routine program with the DI instruction. During access to the device of the corresponding argument of the instruction, Basic however, the interrupt program will not be inserted and therefore data Note3.11...
  • Page 84 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (5) Save and restoration of index register data and file register No. When an interrupt program is executed by default of the CPU module, the index register data and file register block No. are saved and restored at the time of switching Basic Redundant Note3.12...
  • Page 85 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (c) Timers (T) and counters (C) Timers and counters are not available for interrupt programs. The timers (T) and counters (C) update the current values and turn ON/OFF the contacts when the OUT T and OUT C instructions are executed, respectively.
  • Page 86 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 2) High Performance model QCPU or Process CPU • Special registers SD520, SD521 : Current scan time SD522, SD523 : Initial scan time SD524, SD525 : Minimum scan time SD526, SD527 : Maximum scan time SD528, SD529 : Current scan time for low speed execution type program SD532, SD533 : Minimum scan time for low speed execution type program...

  • Page 87: Settings For Execution Of Only One Sequence Program

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.2 Settings for Execution of Only One Sequence Program A sequence program performs operation from Step 0 to the END/FEND instruction. It performs an END processing when the END/FEND instruction is executed. After the END processing, operation restarts from Step 0. As described above, the sequence program repeats the operation from Step 0 to the END/ FEND instruction.
  • Page 88 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (c) Scan time watch The CPU module has scan time watch timers (watchdog timers).( (2) in this section) (2) WDT (Watchdog timer) The watchdog timer (hereafter abbreviated to the WDT) watches the scan time. The default value is 200ms.

  • Page 89: Settings For Creation And Execution Of Multiple Sequence Programs

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.3 Settings for Creation and Execution of Multiple Sequence Basic Programs Note3.15 When multiple sequence programs are created, the execution type can be specified for each program, e.g. a program started only once at startup or a program executed at fixed intervals.Note15 (1) Applications for multiple sequence programs creation A program can be divided into multiple programs on the basis of each control unit and...
  • Page 90 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (3) Program storage location The programs executed by the CPU module can be stored into the following memories. • Program memory • Standard ROM • Memory card (4) Available execution types The following program execution types can be set on the CPU module. •...

  • Page 91: Initial Execution Type Program

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.3.1 Initial execution type programNote17 Basic Note3.17 (1) Definition of initial execution type program An initial execution type program is executed only once when the PLC is powered ON or the STOP status is changed to the RUN status. The initial execution type program can be used for a program that need not be executed from the next scan or later once it is executed, e.g.

  • Page 92: Scan Execution Type Program

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (2) Initial execution type program processing (a) Execution sequence When the execution of all the initial execution type program is completed, an END processing is performed and a scan execution type program is executed at the next scan.
  • Page 93 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3) When interrupt program/fixed scan execution type program is executed When an interrupt program/fixed scan execution type program is executed before completion of the initial execution type program execution, the interrupt program/fixed scan execution type program execution time is added to the initial execution type program execution time.
  • Page 94 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (4) Settings for initial execution type program execution (a) Program Set the execution type to "Initial" in the program of the PLC parameter dialog box. When using multiple initial execution type programs, register them in the order of execution.
  • Page 95 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.3.2 Scan execution type programNote19 Basic Note3.19 (1) Definition of scan execution type program An scan execution type program is executed once for each scan, starting at the next scan after execution of the initial execution type program. STOP Power supply ON 1st scan...
  • Page 96 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 2) Accuracy and measurement of scan time The accuracy of each scan time stored into the special registers is 0.1ms. Even if the watchdog timer reset instruction (WDT) is executed in a sequence program, the measurement of each scan time is continued. 3) Execution of multiple scan execution type programs When multiple scan execution type programs are executed, the scan execution type program execution time is the time taken until the execution of...
  • Page 97 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (3) Settings for execution of scan execution type programs (a) Program Set the execution type to "Scan" in the program of the PLC parameter dialog box. When using multiple scan execution type programs, register them in the order of execution.

  • Page 98: Low Speed Execution Type Program

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS Basic 3.3.3 Low speed execution type programNote20 Note3.20 (1) Definition of low speed execution type program Redundant A low speed execution type program is executed only during the excess time of constant scan or the preset low speed program execution time. Note3.20 The low speed execution type program can be used for the program that need not be executed every scan (e.g.
  • Page 99 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (b) When there is excess time after completion of all low speed execution type program execution within one scan The processing performed after completion of low speed execution type program operation varies depending on the ON/OFF status of the special relay SM330 and low speed execution type program execution condition.
  • Page 100 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS When constant scan is set The following timing charts show the operations performed when low speed execution type programs are executed under the conditions given below. • Constant scan time : 8ms • Total execution time of scan execution type programs : 4 to 5ms •...
  • Page 101 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS When low speed program execution time is set The following timing charts show the operations performed when low speed execution type programs are executed under the conditions given below. • Low speed program execution time : 3ms •...
  • Page 102 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (c) When low speed execution type programs could not be processed within the excess time of constant scan or the low speed execution program execution time Program execution is suspended once and the remaining programs are executed at the next scan.
  • Page 103 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (e) Low speed scan time Low speed scan time is the sum of all the low speed execution type program execution times and the low speed END processing time. Refer to Diagram 3.29 for differences between low speed END processing and END processing.
  • Page 104 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS POINT When a low speed execution type program and an initial execution type program are to be executed, the low speed execution type program is executed after completion of the initial execution type program( Section 3.3.1).
  • Page 105 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (4) Settings for low speed execution type program execution (a) Program Set the execution type to "Low speed" in the program of the PLC parameter dialog box. When using multiple low speed execution type programs, register them in the order of execution.

  • Page 106: Stand-By Type Program

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.3.4 Stand-by type programNote21 Basic Note3.21 (1) Definition of stand-by type program A stand-by type program is executed only when its execution is requested. It can also be changed to another execution type by a sequence program instruction. (2) Applications of stand-by type program The stand-by type program is used in the following applications.
  • Page 107 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (3) Stand-by type program execution method A stand-by type program can be executed in either of the following methods. • Create subroutine and/or interrupt programs in a stand-by type program and call them using a pointer or when an interrupt occurs. (3)(a) in this section) •...
  • Page 108 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 1) Operation of subroutine and interrupt programs in stand-by type program When the execution of the stand-by type program is finished, a program in the stand-by type program is called and its execution is resumed. Diagram 3.39 shows the operation performed when the subroutine and interrupt programs in the stand-by type program is executed.
  • Page 109 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 1) Example of changing the execution type in scan execution type program • Set programs "ABC" and "GHI" as scan execution type programs. Set program "DEF" as a stand-by type program. • When the condition is satisfied (the internal relay (M0) in Diagram 3.40 turns ON), "DEF"...
  • Page 110 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 2) Timing for execution type change The program execution type is changed in the END processing. Hence, it is not changed midway through program execution. When different types are set to the same program in the same scan, it is changed to the execution type executed by the latest instruction.

  • Page 111: Fixed Scan Execution Type Program

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.3.5 Fixed scan execution type program Basic Note3.23 (1) Definition of fixed scan execution type programNote23 This program is executed at the specified time intervals. It can be executed at fixed cycle intervals for each file without description of interrupt pointers and IRET instructions.
  • Page 112 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS Remark Refer to the following manual for the block guarantee of cyclic data per station. Q Corresponding MELSECNET/H Network System Reference Manual 10ms 10ms 10ms 10ms Interrupt factor Fixed scan execution type program execution Link refresh execution Link refresh is suspended and fixed...
  • Page 113 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (e) Index register processing Redundant Refer to Section 9.6.2 for the index register processing performed when a scan Note3.24 execution type program/low speed execution type program is switched to a Note3.24 fixed scan execution type program.Note24 (f) High speed execution setting and overhead time of fixed scan execution type program...
  • Page 114 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (3) Precautions for programming (a) Device turned ON/OFF by PLS or similar instruction When using an instruction such as PLS, by which an execution condition turns ON from OFF in the next step and it turns the operation device ON, the device remains ON until the same instruction is executed.
  • Page 115 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (f) When interrupt/fixed scan execution type program is executed for execution time measurement, etc. When an interrupt/fixed scan execution type program is executed to measure scan time or execution time using special registers, the time of the above program is added to the measurement time.
  • Page 116 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (4) Settings for execution of fixed scan execution type program (a) Program Set the execution type to "Fixed scan" in the program setting of the PLC parameter dialog box. When using multiple fixed scan execution type programs, register them in the order of execution.

  • Page 117: Execution Type Setting And Example Of Type Changing

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.3.6 Execution type setting and example of type changingNote26 Basic Note3.26 (1) Execution type setting Program setting necessary for executing multiple programs is explained in this section. Set the program execution type in the program of the PLC parameter dialog box of GX Developer.
  • Page 118 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 4) Stand-by type (Wait) This program is executed only when an execution is requested. Section 3.3.4) 5) Fixed scan execution type (Fixed scan) This program is executed at the time intervals set to "Fixed scan interval" and "Unit".( Section 3.3.5) •...
  • Page 119 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (d) I/O refresh setting The CPU module updates the I/O of the I/O modules and intelligent function modules by block I/O refresh.( Section 3.8.1) When I/O refresh setting is performed, the I/O refresh in the specified range can be made for each set program.
  • Page 120 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (2) Each program flow of CPU module Diagram 3.52 shows each program flow in the case where the PLC is powered ON or the CPU module is switched from STOP to RUN. Note3.28 Redundant Power supply OFF STOP Note3.28...
  • Page 121 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (3) Example of instruction-triggered execution type changing (a) Execution type changing instruction Using this instruction can change the execution type even during sequence program execution. Redundant Note3.29 Use any of the PSCAN, PLOW ,PSTOP and/or POFF instructions to change the execution type.Note29 Note3.29...
  • Page 122 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS POINT Once the fixed scan execution type program is changed to another execution type, it cannot be returned to the fixed scan execution type. (b) Example of execution type changing In a control program, the stand-by type program matching the preset condition is changed to the scan execution type program.

  • Page 123: Operation Processing

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.4 Operation Processing This section explains the operation processing of the CPU module. 3.4.1 Initial processing Initial processing is a preprocessing for execution of the sequence operation. It is executed only once in the CPU module statuses indicated in Table3.4. When the initial processing is completed, the CPU module is placed in the operation status set by the RUN/STOP switch (RUN/STOP/RESET switch in the case of the Basic model QCPU).(...

  • Page 124: I/O Refresh (I/O Module Refresh Processing)

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS POINT 1. The STOP, RUN and RESET switches of the CPU module are provided differently depending on the CPU module. • Switch of Basic model QCPU RUN/STOP/RESET switch RESET STOP • Switches of High Performance model QCPU, Process CPU and Redundant CPU RUN/STOP switch STOP...

  • Page 125: End Processing

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.4.4 END processing This is a post-processing to return the sequence program execution to step 0 after completing the whole sequence program operation processing once. (1) Operations of END processing The END processing includes the following. Table3.5 END processing list CPU modules performing END processing High...

  • Page 126: Run, Stop, Pause Operation Processing

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.5 RUN, STOP, PAUSE Operation Processing CPU module has three types of operation status; RUN, STOP and PAUSE status. CPU module operation processing is explained below: (1) RUN Status Operation Processing RUN status indicate that the sequence program operation is performed from step 0 to END (FEND) instruction to step 0 repeatedly.
  • Page 127 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (4) CPU module operation processing by switch operation Note35 Table3.6 Operation processing by switch operation CPU module operation processing Sequence Device memory RUN/STOP program status External output operation M,L,S,T,C,D processing Saves the output (Y) Saves the output (Y) Executes up to Saves the device memory...

  • Page 128: Operation Processing During Momentary Power Failure

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.6 Operation Processing during Momentary Power Failure When the input voltage supplied to the power supply module drops below the specified range, the CPU module detects a momentary power failure and performs the following operation.

  • Page 129: Data Clear Processing

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.7 Data Clear Processing This section explains how to clear the CPU module data and the settings about the latch data clearing. (1) Data clearing method and data that cannot be cleared The CPU module data are cleared when the CPU module is reset with the RESET/ L.CLR switch (the RUN/STOP/RESET switch when the Basic model QCPU is used) or when the power is switched from ON to OFF and then to ON.
  • Page 130 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (2) Device latch specification Make the latch specification (latch range setting) for each device in the device setting of the PLC parameter dialog box of GX Developer.( Section 6.3(5)) (a) Latch range setting The latch range can be set by the following 2 methods using GX Developer. 1) Latch clear operation enable (Latch (1) first/last) Basic Set the latch range that can be cleared by the latch clear operation performed...

  • Page 131: I/O Processing And Response Lag

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.8 I/O Processing and Response Lag The CPU module performs I/O processing in a refresh mode. Using direct access I/O in a sequence program, however, allows the CPU module to perform direct mode I/O processing corresponding to each instruction. This section explains these I/O processing modes and response lags of the CPU module.

  • Page 132: Refresh Mode

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.8.1 Refresh mode (1) Definition of refresh mode The refresh mode batch-accesses I/O modules before start of sequence program operation. Input of ON/OFF data by input refresh Device memory Output of ON/OFF data by output refresh ON/OFF data ON/OFF data...
  • Page 133 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (3) Output The operation result in an output (Y) sequence program is output to the output (Y) device memory in the CPU module every time the operation is performed, and the ON/OFF data of the output (Y) device memory are batch-output to the output module before start of sequence program operation.
  • Page 134 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (4) Response lag An output change lags a maximum of two scans behind an input module change depending on the ON timing of an external contact. Ladder examples Ladder that turns the Y5E output ON when an X5 input turns ON.

  • Page 135: Direct Mode

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.8.2 Direct mode (1) Definition of direct mode The direct mode accesses an I/O module when each instruction is executed in a sequence program. Input of ON/OFF data at instruction execution Device memory Output of ON/OFF data at instruction execution ON/OFF data DX10...
  • Page 136 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS CPU module Remote network input refresh (operation module area processing area) Input Developer module Input (X) input area device memory Output (Y) Output device DY25 module memory • When an input contact instruction has been executed: The input module's input information 1) is ORed with GX Developer input area's input information 2) or remote input refresh area data, and the result is stored into the input (X) device memory.
  • Page 137 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (2) Response lag An output change lags a maximum of one scan behind an input module change depending on the ON timing of an external contact. Ladder examples Ladder that turns the DY5E output DY5E ON when an DX5 input turns ON.

  • Page 138: Numeric Values Which Can Be Used In Sequence Programs

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.9 Numeric Values which can be Used in Sequence Programs Numeric and alphabetic data are expressed by "0" (OFF) and "1" (ON) numerals in the CPU module. This expression form is called "binary code" (BIN). The hexadecimal (HEX) expression form in which BIN data are expressed in 4-bit units, and the BCD (binary coded decimal) expression form are applicable to the CPU module.
  • Page 139 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (1) Numeric value input from outside to CPU module When setting a numeric value from an external digital switch or similar device to the CPU module, BCD (binary coded decimal) can be used as the same setting in DEC (decimal) by the method given in (b).
  • Page 140 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (2) Numeric value output from CPU module to outside A digital display or similar device is available to externally display the numeric value operated by the CPU module. (a) How to output numeric value The CPU module performs operation in BIN.

  • Page 141: Bin (Binary Code)

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.9.1 BIN (Binary Code) (1) Binary code Binary date is represented by 0 (OFF) and 1 (ON). Decimal notation uses the numerals 0 through 9. When counting beyond 9, a 1 is placed in the 10s column and a 0 is placed in the 1s column to make the number 10. In binary notation, the numerals 0 and 1 are used.

  • Page 142: Hex (Hexadecimal)

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.9.2 HEX (Hexadecimal) (1) Hexadecimal notation In hexadecimal notation, 4 binary bits are expressed in 1 digit. If 4 binary bits are used in binary notation, 16 different values from 0 to 15 can be represented.

  • Page 143: Bcd (Binary Coded Decimal)

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.9.3 BCD (Binary Coded Decimal) (1) BCD notation BCD (binary coded decimal) is a numbering system in which one digit of DEC (decimal) is expressed in BIN (binary). Though it uses 4-bit representation like hexadecimal notation, it dose not use letters to F Table3.11 shows the numeric expressions of BIN, BCD and DEC.

  • Page 144: Real Numbers (Floating Decimal Point Data)

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.9.4 Real numbers (floating decimal point data) (1) Real numbers Real numbers are single precision floating decimal point data. (2) Internal expression of floating decimal point data The CPU module internal expression of received real number data is explained below. Real number data is expressed as shown below, using 2 word devices.

  • Page 145: Real Numbers (Floating Decimal Point Data) ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (3) Calculation examples Calculation examples are shown below (the nnnnn "X" indicates an X-system data expression). (a) Storing "10" (10) (1010) (1.01000..Sign Positive to 0 Exponent part 3 to 82 to (10000010) Mantissa (010 00000 00000 00000 00000) Therefore, the data expression will be 41200000 , as shown below.
  • Page 146 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (4) Method and precautions for internal operation processing with double Basic Process Redundant Note3.41 precision Note42 The High Performance model QCPU permits selection of "Perform internal operation Note3.41 Note3.41 Note3.41 processing with double precision" or "Do not perform internal operation processing with double precision".
  • Page 147 SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS (c) Applications and precautions The following explains the applications and precautions for the cases where internal operation processing is performed with double precision and not performed. 1) When internal operation processing is performed with double precision This option is used when accuracy is required to ensure compatibility with the conventional models.

  • Page 148: Character String Data

    SEQUENCE PROGRAM CONFIGURATION AND EXECUTION CONDITIONS 3.10 Character String DataNote43 Basic Note3.42 Note3.42 (1) Character String Data The CPU module uses ASCII code data. (2) ASCII code character strings ASCII code character strings are shown in Table3.12. "00 " (NUL code) in Table3.12 is used at the end of a character string. Table3.12 ASCII code character strings Column b1 Low...

  • Page 149: Chapter4 I/O Number Assignment

    Q3 B,Q3 RB Q12PRHCPU,Q25PRHCPU * 1 : The Q00JCPU is a CPU module integrated with a power supply module and a main base unit. It requires no power supply module and main base unit. * 2 : For the Q12PHCPU, Q25PHCPU, Q12PRHCPU and Q25PRHCPU, the slim type main base unit (Q3 SB) is not available.

  • Page 150: Relationship Between No. Of Extension Stages And No. Of Slots

    Table4.2 Number of extension stages (extension base units) and numbers of slots Extension base unit Number of available slots CPU module Slim type main base unit (Number of extension stages) (Number of available modules) Q00JCPU (2 stages) 16 slots (modules) Q00CPU,Q01CPU 24 slots (modules) (4 stages) Q02CPU,Q02HCPU,Q06HCPU,...
  • Page 151 I/O NUMBER ASSIGNMENT (2) Precautions for the number of mounted modules Mount modules within the range of the allowed number of slots. Even if the total number of slots for a main base unit and extension base unit is greater than the number of available slots (for example, six 12-slot base units are used), no error will occur when modules are mounted in slots whose number is within a valid range.

  • Page 152: Installing Extension Base Units And Setting The Number Of Stages

    4.3 Installing Extension Base Units and Setting the Number of Stages The extension base units shown in Table4.3 are available. Table4.3 Available extension base units CPU module Available extension base unit Q00JCPU Q5 B,Q6 B,Q6 RB Q00CPU,Q01CPU Q02CPU,Q02HCPU,Q06HCPU,Q12HCPU,Q25HCPU Q5 B,Q6 B,Q6 RB, QA1S6 B...
  • Page 153 I/O NUMBER ASSIGNMENT (1) Extension stage number setting and setting order When using extension base units for extension, set the extension stage numbers with the stage number setting connectors on the extension base units. Set the extension stage numbers in order of connection, starting from the extension base unit connected to the main base unit.
  • Page 154 I/O NUMBER ASSIGNMENT (2) Precautions for extension stage number setting (a) Extension stage number setting order Set the extension stage numbers consecutively. If any extension stage number is skipped in the auto mode( Section 4.4(1))of base unit assignment, 0 slot is set to the skipped stage and the number of empty slots does not increase.
  • Page 155 I/O NUMBER ASSIGNMENT (b) When the same extension stage number is set The same extension stage number cannot be set to multiple extension base units. Main base unit Q312B Slot number Power supply CPU module module Extension base unit Q68B Extension 1 The same extension stage number cannot be set!
  • Page 156 I/O NUMBER ASSIGNMENT (c) When connector pins are inserted into two or more positions or no connector pin is inserted Extension base units cannot be used with connector pins inserted in two or more positions. Also, they cannot be used without connector pins being inserted. Main base unit Q312B Slot number...
  • Page 157 I/O NUMBER ASSIGNMENT Basic Process Redundant (d) Layout for use of AnS series compatible extension base units Note4.1 (QA1S6 B) Note1 Note4.1 Note4.1 Note4.1 When using the Q5 B/Q6 B/Q6 RB together with the QA1S6 B in a system, connect all of the Q5 B/Q6 B/Q6 RB close to the main base unit and then connect the QA1S6 B after them.

  • Page 158: Base Unit Assignment (Base Mode)

    Since the Q series CPU module occupies only the mountable slots of the base unit, only 3 slots are occupied when a 3-slot base unit is used. Note2 Basic Process Redundant For the Q00JCPU, Process CPU and Redundant CPU, slim type main base units are not available. Note4.2 Note4.2 Note4.2 Note3 Redundant For the Redundant CPU, extension base units are not available.
  • Page 159 I/O NUMBER ASSIGNMENT (a) For 3-slot base unit: 3 slots are occupied Main base unit Q33B Slot number Power supply CPU module 5 slots are not module occupied. Extension base unit Q63B 5 slots are not Q63B occupied. 5 slots are not occupied.
  • Page 160 I/O NUMBER ASSIGNMENT (b) For 5-slot base unit/Q00JCPU: 5 slots are occupied Main base unit Q35B Slot number Power supply CPU module 3 slots are not module occupied. Extension base unit Q65B 3 slots are not occupied. Diagram 4.10 For 5-slot base units...
  • Page 161 I/O NUMBER ASSIGNMENT (d) For 12-slot base unit: 12 slots are occupied Main base unit Q312B Slot number Power supply CPU module module Extension base unit Q612B Diagram 4.12 For 12-slot base units 4.4 Base Unit Assignment (Base Mode) - 13...
  • Page 162 I/O NUMBER ASSIGNMENT (2) Detail mode In Detail mode, set the number of mountable modules to each base unit in the I/O assignment setting of the PLC parameter dialog box. (a) Applications This mode can be used when matching the number of mountable modules with the number of modules (fixed to 8 slots) occupied by the AnS series base unit, for example.
  • Page 163 I/O NUMBER ASSIGNMENT 2) When the preset number of slots is less than the number of actually used slots The slots other than those designated are disabled. For example, when 8 slots are designated for a 12-slot base unit, the 4 slots on the right of the base unit are disabled.
  • Page 164 I/O NUMBER ASSIGNMENT (3) Setting screen and setting items for Base mode of GX Developer Diagram 4.15 I/O assignment (a) Base model name Set the mounted base unit model name within 16 characters. CPU module does not use the designated model name. (It is used as a user's memo or for parameter printing) (b) Power model name Set the mounted power supply module model name within 16 characters.

  • Page 165: Definition Of I/O Number

    I/O NUMBER ASSIGNMENT 4.5 Definition of I/O Number I/O numbers indicate the addresses used in a sequence program to input or output ON/ OFF data between the CPU module and other modules. (1) Input and output of ON/OFF data Input (X) is used to input ON/OFF data to the CPU module, and output (Y) is used to output ON/OFF data from the CPU module.

  • Page 166: Concept Of I/O Number Assignment

    I/O NUMBER ASSIGNMENT 4.6 Concept of I/O Number Assignment 4.6.1 I/O numbers of base unit The CPU module assigns I/O numbers at power-on or reset. Diagram 4.17 shows the example of the I/O number assignment when the base unit is set in Auto mode without I/O assignment.
  • Page 167 I/O No. on right of Redundant CPU (Slot 1) is X/Y0. Note4 Basic Basic Process Redundant For the Q00JCPU, Process CPU and Redundant CPU, slim type main base units are not available. Note4.4 Note4.4 Note4.4 4.6 Concept of I/O Number Assignment - 19 4.6.1 I/O numbers of base unit...
  • Page 168 I/O NUMBER ASSIGNMENT Note4.5 Redundant (3) Order of I/O number assignment for extension base units Note5 The I/O numbers for extension base units continue from the last number of the I/O Note4.5 number of the main base unit. The I/O numbers are assigned to the extension base units from left (I/O 0) to right consecutively as shown in Diagram 4.18, in the order in which the setting connectors of the extension base unit are set.

  • Page 169: I/O Numbers Of Remote Station

    I/O NUMBER ASSIGNMENT 4.6.2 I/O numbers of remote station It is possible to allocate CPU module device input (X) and output (Y) to remote station I/O Basic modules and intelligent function modules and control the modules in the MELSECNET/H Note4.6 Note4.7 Note4.6 remote network...
  • Page 170 I/O NUMBER ASSIGNMENT (2) Precautions for using remote station I/O numbers (a) Setting in consideration of future extension When using the input (X) and output (Y) of the CPU module for the I/O numbers of remote stations, set them in consideration of extension of I/O modules and/or intelligent function modules on the CPU module side.( Diagram 4.20) Input/output (X/Y)

  • Page 171: I/O Assignment By Gx Developer

    I/O NUMBER ASSIGNMENT 4.7 I/O Assignment by GX Developer This section describes the I/O assignment using GX Developer. 4.7.1 Purpose of I/O assignment by GX Developer Perform I/O assignment setting by GX Developer in the following cases. (1) Reserving points when converting to module other than 16-point modules You can reserve the number of points in advance so that you do not have to change the I/O numbers when the current module will be changed to one with a different...
  • Page 172 I/O NUMBER ASSIGNMENT POINT 1. The I/O assignment setting becomes valid when the PLC is powered OFF and then ON or the CPU module is reset. 2. The I/O assignment setting is necessary for changing the response time of the input modules and the switch of intelligent function modules. 3.

  • Page 173: Concept Of I/O Assignment Using Gx Developer

    I/O NUMBER ASSIGNMENT 4.7.2 Concept of I/O assignment using GX Developer In I/O assignment, the "Type (module type)", "Points (I/O points)" and "Start XY" (starting I/ O number) can be set for each slot of the base units. For example, to change the number of occupied I/O points of the designated slot, only the number of occupied I/O points can be designated.
  • Page 174 * 1 : Not available for the Q00JCPU. (Because the I/O points of the Q00JCPU are 256.) (e) Start XY (Used with CPU module) When the I/O number of each slot is changed, you should designate the head I/O number according to the change.
  • Page 175 I/O NUMBER ASSIGNMENT (2) Precautions for I/O assignment (a) Slot status after I/O assignment When I/O assignment setting has been made to a slot, that setting has precedence over the mounted module. 1) When the preset number of points is less than the number of I/O points of modules actually mounted The I/O points for actually mounted modules are decreased.
  • Page 176 I/O NUMBER ASSIGNMENT 5) Last I/O number In I/O assignment, set the last I/O number not to exceed the maximum value( CHAPTER 2)of the I/O points. An error ("SP. UNIT LAY ERR.") will occur if the last I/O number exceeds the maximum value of the I/O points.
  • Page 177 I/O NUMBER ASSIGNMENT (b) Precautions for automatic start XY assignment by CPU module When the start XY is not yet entered, the CPU module automatically assigns it. In the case of 1) or 2) below, therefore, the start XY setting of each slot may overlap the one assigned by the CPU module.

  • Page 178: Examples Of I/O Number Assignment

    I/O NUMBER ASSIGNMENT 4.8 Examples of I/O Number Assignment The following example shows I/O number assignment made when I/O assignment setting is performed using GX Developer. (1) When changing the number of points of an empty slot from 16 to 32 points: Reserve 32 points so that the I/O numbers of Slot No.
  • Page 179 I/O NUMBER ASSIGNMENT (b) I/O assignment with GX Developer Designate slot No. 3 to "32 points" at the "I/O assignment" tab screen of GX Developer. Select 32 points. (When the type is not selected, the type of the installed module will be selected.) Diagram 4.25 I/O assignment (When changing points of empty Slot 3) (c) I/O number assignment after the I/O assignment with GX Developer Q38B...
  • Page 180 I/O NUMBER ASSIGNMENT (2) Changing the I/O number of slots Change the I/O number of an empty slot (slot No. 3) to X200 through 21F so that the I/ O numbers of slot No. 4 and later slots do not change when a 32-point input module is mounted to the empty slot (slot No.
  • Page 181 I/O NUMBER ASSIGNMENT (b) I/O assignment with GX Developer Designate the head I/O number of slot No. 3 to "200" and that of slot No. 4 to "70" at the "I/O assignment" tab screen of GX Developer. "200" is designated as the head I/O number.

  • Page 182: Checking The I/O Numbers

    I/O NUMBER ASSIGNMENT 4.9 Checking the I/O Numbers System monitor of GX Developer allows the check of the mounted modules of CPU module and their I/O numbers.( Section 6.20) 4.9 Checking the I/O Numbers - 34...

  • Page 183: Chapter5 Memories And Files Handled By Cpu Module

    Device initial value Standard RAM CPU module File register CPU shared memory * 1 : The Q00JCPU does not have the standard RAM. File registers are unavailable. Diagram 5.1 Data handled by Basic model QCPU (a) Program memory ( Section 5.1.2) The program memory stores the program used by the Basic model QCPU to perform operation.
  • Page 184 Refer to CHAPTER 2 for the number of storable file register points. * 4 : Any of sequence program, ST program and SFC program data is necessary. * 5 : The Q00JCPU does not have the standard RAM. * 6 : Set the area used by the system. ( Section 5.1.2(3)(b))

  • Page 185: Program Memory

    MEMORIES AND FILES HANDLED BY CPU MODULE 5.1.2 Program memory (1) Definition of program memory The program memory stores the program used by the Basic model QCPU to perform operation. The program stored in the standard ROM is booted (read) to the program memory to perform operation.
  • Page 186 MEMORIES AND FILES HANDLED BY CPU MODULE (b) Create a user setting system area When formatting the program memory, set the user setting system area capacity. 1) Do not create a user setting system area The program memory is formatted without the user setting system area being created.
  • Page 187 MEMORIES AND FILES HANDLED BY CPU MODULE (c) Checking the memory capacity after formatting To check the memory capacity, choose [Online] [Read from PLC] on GX Developer. 1) Select "Program memory/Device memory" as the target memory on the Read from PLC screen. 2) Click the button.
  • Page 188 MEMORIES AND FILES HANDLED BY CPU MODULE (4) Write to program memory To write data to the program memory, choose [Online] [Write to PLC] on GX Developer. Select "Program memory/Device memory" as the target memory on the Write to PLC screen and write data to the PLC.

  • Page 189: Standard Rom

    MEMORIES AND FILES HANDLED BY CPU MODULE 5.1.3 Standard ROM (1) Definition of standard ROM The standard ROM is used to execute boot run by the Basic model QCPU. The standard ROM is used to save programs and parameters without battery backup. The program stored in the standard ROM is booted (read) to the program memory Section 5.1.2) to perform operation.
  • Page 190 MEMORIES AND FILES HANDLED BY CPU MODULE (4) Write to standard ROM To write data to the standard ROM, choose [Online] [Write to PLC (Flash ROM)] [Write the program memory to ROM...] on GX Developer. ( Section 5.1.5) POINT The file size has the minimum unit. ( Section 5.4.4) The occupied memory capacity may be greater than the actual file size.

  • Page 191: Standard Ram

    MEMORIES AND FILES HANDLED BY CPU MODULE 5.1.4 Standard RAM (1) Definition of standard RAM The standard RAM is provided to use file registers. (Q00CPU and Q01CPU only) The file registers of the standard RAM allow fast access like the data registers. (2) Storable data The standard RAM can store one file of file register.
  • Page 192 MEMORIES AND FILES HANDLED BY CPU MODULE (b) Checking the memory capacity after formatting To check the memory capacity, choose [Online] [Read from PLC] on GX Developer. 1) Select "Standard RAM" as the target memory on the Read from PLC screen. 2) Click the button.
  • Page 193 MEMORIES AND FILES HANDLED BY CPU MODULE (4) Write to standard RAM To write data to the standard RAM, choose [Online] [Write to PLC] on GX Developer. Select "Standard RAM" as the target memory on the Write to PLC screen and write data to the PLC.

  • Page 194: Standard Rom Program Execution (Boot Run) And Writing

    MEMORIES AND FILES HANDLED BY CPU MODULE 5.1.5 Standard ROM program execution (boot run) and writing (1) Standard ROM program execution (boot run) (a) Standard ROM program execution The Basic model QCPU performs operation of the program stored in the program memory.
  • Page 195 MEMORIES AND FILES HANDLED BY CPU MODULE 3) Write to standard ROM by GX Developer • Choose [Online] [Write to PLC] on GX Developer and write the files to the program memory. • Choose [Online] [Write to PLC (Flash ROM)] [Write the program memory to ROM...] on GX Developer, and write to the standard ROM the files written to the program memory.
  • Page 196 MEMORIES AND FILES HANDLED BY CPU MODULE (2) Write to standard ROM The program memory files are written to the standard ROM by batch-copying them to the standard ROM. (a) Before write Check the following points before writing the files to the standard ROM. 1) Saving the standard ROM files When files are written to the standard ROM, all files previously stored in the standard ROM are automatically deleted.
  • Page 197 MEMORIES AND FILES HANDLED BY CPU MODULE (3) Additions/changes to standard ROM files Since all files stored in the standard ROM are automatically deleted when files are to be written to the standard ROM, additions/changes to the stored files cannot be made directly.

  • Page 198: High Performance Model Qcpu, Process Cpu And Redundant Cpu

    MEMORIES AND FILES HANDLED BY CPU MODULE 5.2 High Performance Model QCPU, Process CPU and Redundant 5.2.1 Memory configuration and storable data This section explains the memories handled by the High Performance model QCPU, Process CPU and Redundant CPU and the data that can be stored into the memories. (1) Memory configuration Program memory Parameter...
  • Page 199 MEMORIES AND FILES HANDLED BY CPU MODULE (c) Standard RAM ( Section 5.2.4) The standard RAM is provided to use the file registers and local devices without installation of a memory card. (d) Memory card ( Section 5.2.5) The memory card is used to increase memory in addition to the built-in memory of the High Performance model QCPU, Process CPU or Redundant CPU.
  • Page 200 MEMORIES AND FILES HANDLED BY CPU MODULE (2) Data that can be stored into memories Table5.4 indicates the data that can be stored into the program memory, standard RAM, standard ROM and memory cards and the corresponding drive Nos. Table5.4 Storable data and storage locations Memory card CPU module built-in memories Memory cards (ROM)
  • Page 201 MEMORIES AND FILES HANDLED BY CPU MODULE (3) Memory capacities and formatting necessities High Performance Table5.5 indicates the memory capacity and formatting necessity of each memory. Note2 Note5.2 Table5.5 Formatting necessity Q12PH Q25PH Q12RPH Q25PRH Q02CPU Q02HCPU Q06HCPU Q12HCPU Q25HCPU Formatting 112k 112k...

  • Page 202: Program Memory

    MEMORIES AND FILES HANDLED BY CPU MODULE 5.2.2 Program memory (1) Definition of program memory The program memory stores the program used by the High Performance model QCPU, Process CPU or Redundant CPU to perform operation. The program stored in the standard ROM or memory card is booted (read) to the program memory to perform operation.
  • Page 203 MEMORIES AND FILES HANDLED BY CPU MODULE (b) Create a user setting system area When formatting the program memory, set the user setting system area capacity. 1) Do not create a user setting system area The program memory is formatted without the user setting system area being created.
  • Page 204 MEMORIES AND FILES HANDLED BY CPU MODULE (c) Checking the memory capacity after formatting To check the memory capacity, choose [Online] [Read from PLC] on GX Developer. 1) Select "Program memory/Device memory" as the target memory on the Read from PLC screen. 2) Click the button.
  • Page 205 MEMORIES AND FILES HANDLED BY CPU MODULE (4) Write to program memory To write data to the program memory, choose [Online] [Write to PLC] on GX Developer. Select "Program memory/Device memory" as the target memory on the Write to PLC screen and write data to the PLC.

  • Page 206: Standard Rom

    MEMORIES AND FILES HANDLED BY CPU MODULE 5.2.3 Standard ROM (1) Definition of standard ROM The standard ROM stores parameters, programs and other data for running boot on the High Performance model QCPU, Process CPU or Redundant CPU. The standard ROM is used to save programs and parameters without battery backup. (2) Storable data The standard ROM can store parameters, intelligent function module parameters, programs, device comments and device initial value data.
  • Page 207 MEMORIES AND FILES HANDLED BY CPU MODULE (4) Write to standard ROM There are the following 3 methods for writing data to the standard ROM. • Choose [Online] [Write to PLC (Flash ROM)] [Write the program memory to ROM...] on GX Developer to batch-copy the program memory data to the standard ROM.

  • Page 208: Standard Ram

    MEMORIES AND FILES HANDLED BY CPU MODULE 5.2.4 Standard RAM (1) Definition of standard RAM The standard RAM is provided to use file registers and local devices without installation of a memory card. The standard RAM used as file registers allows fast access like the data registers. (2) Storable data The standard RAM can store one file register file and one local device file (a total of two files).
  • Page 209 MEMORIES AND FILES HANDLED BY CPU MODULE (b) Checking the memory capacity after formatting To check the memory capacity, choose [Online] [Read from PLC] on GX Developer. 1) Select "Standard RAM" as the target memory on the Read from PLC screen. 2) Click the button.
  • Page 210 MEMORIES AND FILES HANDLED BY CPU MODULE (4) Write to standard RAM To write data to the standard RAM, choose [Online] [Write to PLC] on GX Developer. Select "Standard RAM" as the target memory on the Write to PLC screen and write data to the PLC.

  • Page 211: Memory Card

    MEMORIES AND FILES HANDLED BY CPU MODULE 5.2.5 Memory card (1) Memory card A memory card is used to increase memories in addition to the built-in memory of the High Performance model QCPU, Process CPU or Redundant CPU. Available memory cards are the SRAM card, Flash card and ATA card. (a) SRAM card Data can be written/read by a sequence program.
  • Page 212 MEMORIES AND FILES HANDLED BY CPU MODULE (3) Before using the SRAM or ATA card Before using the SRAM or ATA card, be sure to format it by GX Developer. (a) Formatting To format the program memory, choose [Online] [Format PLC memory] on GX Developer.
  • Page 213 MEMORIES AND FILES HANDLED BY CPU MODULE (b) Checking the memory capacity after formatting To check the memory capacity, choose [Online] [Read from PLC] on GX Developer. 1) Select "Memory card (RAM)" or "Memory card (ROM)" as the target memory on the Read from PLC screen.
  • Page 214 MEMORIES AND FILES HANDLED BY CPU MODULE (4) Write to memory card The following explains the pre-write operation and the types of wriring methods. (a) Write to SRAM or ATA card To write data to the SRAM or ATA card, choose [Online] [Write to PLC] on GX Developer.
  • Page 215 MEMORIES AND FILES HANDLED BY CPU MODULE (5) How to use the program stored in the memory card Since operation cannot be executed by the program stored in the memory card, use that program by booting (reading) it to the program memory. ( Section 5.2.8) 5.2 High Performance Model QCPU, Process CPU and Redundant CPU - 33...

  • Page 216: Write To Standard Rom And Flash Card By Gx Developer

    MEMORIES AND FILES HANDLED BY CPU MODULE 5.2.6 Write to standard ROM and Flash card by GX Developer (1) Types and applications for writing data to standard ROM and Flash card There are the following methods for writing data to the standard ROM and Flash card Diagram 5.24.
  • Page 217 MEMORIES AND FILES HANDLED BY CPU MODULE (2) Write to standard ROM or Flash card The following explains the pre-write operation and writing methods to the standard ROM or Flash card. (a) Before writing Check the following points before writing the files to the standard ROM or Flash card.
  • Page 218 MEMORIES AND FILES HANDLED BY CPU MODULE 2) Using [Write to PLC (Flash ROM)] of GX Developer • Choose [Online] [Write to PLC (Flash ROM)] [Write to PLC (Flash ROM)] on GX Developer. • The Write to PLC (Flash ROM)screen appears. Diagram 5.26 Write to PLC (Flash ROM)screen •...
  • Page 219 MEMORIES AND FILES HANDLED BY CPU MODULE (4) Precautions (a) Setting of check at communication time of GX Developer Since long processing time is required for writing files to the standard ROM or Flash card, set the GX Developer's check at communication time to 60 seconds or more.
  • Page 220 MEMORIES AND FILES HANDLED BY CPU MODULE (c) Time required for write to PLC (Flash ROM) Using the Write to PLC (Flash ROM) writes data over the entire space of the standard ROM or Flash card. Therefore, even if a program written to the Flash card has a small number of steps, long time will be taken until completion since data are written to the entire space of the Flash card.

  • Page 221: Automatic All Data Write From Memory Card To Standard Rom

    MEMORIES AND FILES HANDLED BY CPU MODULE High 5.2.7 Automatic all data write from memory card to standard ROMNote3 Performance Note5.3 (1) Definition of automatic all data write from memory card to standard ROM The automatic all data write from memory card to standard ROM (hereafter abbreviated to the automatic write to standard ROM) is the function that automatically writes the parameters and programs previously written to a memory card to the standard ROM.
  • Page 222 MEMORIES AND FILES HANDLED BY CPU MODULE (3) Execution procedure for automatic write to standard ROM Perform automatic write to standard ROM in the following procedure. (a) Operation on GX Developer (Setting of automatic write to standard ROM) 1) In the boot file setting of the PLC parameter dialog box, check "Clear the program memory"...
  • Page 223 MEMORIES AND FILES HANDLED BY CPU MODULE 3) Set to the DIP switches of the High Performance model QCPU, Process CPU or Redundant CPU to positions indicating a parameter for valid drive. • When SRAM card is installed••••••• SW2 : ON,SW3 : OFF •...
  • Page 224 MEMORIES AND FILES HANDLED BY CPU MODULE (4) Precautions The following provides the precautions for the automatic write to standard ROM. (a) When file of the same file name exists in the program memory When the program memory has a file whose name is the same as that of the file to be booted from the memory card, that file is overwritten by the file data of the memory card.

  • Page 225: Execution Of Standard Rom/Memory Card Programs (Boot Run)

    MEMORIES AND FILES HANDLED BY CPU MODULE 5.2.8 Execution of standard ROM/memory card programs (boot run) This section explains how to operate the programs stored in the standard ROM or memory card. (1) How to execute the standard ROM/memory card programs The CPU module operates the programs stored in the program memory.
  • Page 226 MEMORIES AND FILES HANDLED BY CPU MODULE (b) Boot file by GX Developer To execute the programs in the standard ROM or memory card, set the names of files to be booted (read) to the program memory in the boot file of the PLC parameter dialog box.
  • Page 227 MEMORIES AND FILES HANDLED BY CPU MODULE (g) Checking whether boot is normally completed Whether a boot is normally completed or not can be checked by the following. • The BOOT LED turns on. • The special relay (SM660) turns ON. •...
  • Page 228 MEMORIES AND FILES HANDLED BY CPU MODULE Basic Redundant Note5.4 (4) Changing the program file during RUN Note4 Note5.4 (a) Changing method During RUN of the High Performance model QCPU or Process CPU, files can be added, changed and deleted from the standard ROM or memory card to the program memory with the following instructions in a sequence program.
  • Page 229 MEMORIES AND FILES HANDLED BY CPU MODULE 2) Standard ROM/memory card (ROM) Even if online program change has been made to the program in the program memory, the change is not updated to the program in the boot source standard ROM/memory card (ROM).

  • Page 230: Details Of Written Files

    MEMORIES AND FILES HANDLED BY CPU MODULE 5.2.9 Details of written files The file name, size, written date and time, etc. set for the created file using GX Developer are added to each file written to the High Performance model QCPU, Process CPU or Redundant CPU.
  • Page 231 MEMORIES AND FILES HANDLED BY CPU MODULE (b) Date, time Indicate the date and time when a file was written from GX Developer to the High Performance model QCPU, Process CPU or Redundant CPU. Note that the indicated date and time are those set on GX Developer (personal computer).

  • Page 232: Program File Structure

    MEMORIES AND FILES HANDLED BY CPU MODULE 5.3 Program File Structure A program file consists of a file header, execution program and allocate memory for online program change. Program file structure 34 steps File header (By dafult) Execution program Area is secured in file size units. Section 5.4.4) Allocate memory 500 steps...
  • Page 233 MEMORIES AND FILES HANDLED BY CPU MODULE (2) Display of program capacity by GX Developer During programming by GX Developer, the program capacity (sum of the file header capacity and the numbers of steps in the created program) is displayed in terms of the number of steps as shown in Diagram 5.39.

  • Page 234: File Operation By Gx Developer And Handling Precautions

    MEMORIES AND FILES HANDLED BY CPU MODULE 5.4 File Operation by GX Developer and Handling Precautions 5.4.1 File operation The file operations shown in Table5.8 can be performed for the files stored in the program Basic Note5.5 memory, standard ROM or memory card by the online operation of GX Developer.

  • Page 235: Precautions For Handling Files

    MEMORIES AND FILES HANDLED BY CPU MODULE 5.4.2 Precautions for handling files (1) Power OFF (including reset) during file operation When the PLC is powered OFF or the CPU module is reset during any file operation, the files of the corresponding memory will be as described in Table5.9. Table5.9 File status at power OFF during file operation CPU module Memory status...

  • Page 236: Memory Capacities Of Files

    MEMORIES AND FILES HANDLED BY CPU MODULE 5.4.3 Memory capacities of files The sizes of the files used by the CPU module change depending on their types. This section indicates the memory capacities of the files for each CPU module. When files are written to the memory area, the units of the storage capacities change depending on the target CPU module and memory area.
  • Page 237 MEMORIES AND FILES HANDLED BY CPU MODULE (2) When High Performance model QCPU, Process CPU or Redundant CPU is used When using the program memory, standard RAM, standard ROM or memory card, calculate the rough size of each file according to Table5.11. Table5.11 Memory capacity calculation for files (High Performance model QCPU, Process CPU, Redundant CPU) Function Rough file capacity (unit: byte)

  • Page 238: File Size Units

    The following table indicates the file size units classified by the target CPU modules and memory areas. Table5.12 File size units of CPU modules (classified by memory areas) Memory area File size unit of program memory/standard ROM/Flash Module name card Q00JCPU Q00CPU 1 step/4 bytes Q01CPU Q02CPU Q02HCPU 128 steps/512 bytes...
  • Page 239 MEMORIES AND FILES HANDLED BY CPU MODULE Basic Note5.7 (b) File size units classified by memory cards Note7 Note5.7 Table5.13 File size units (classified by memory cards) Type Memory card model name File size unit (cluster size) Q2MEM-1MBS 512 bytes SRAM card Q2MEM-2MBS 1024 bytes...
  • Page 240 MEMORIES AND FILES HANDLED BY CPU MODULE (b) Memory capacity calculation The memory capacity is calculated on the basis of the file size unit of the write target CPU module. ( (1) in this section) The file size unit of the Q25HCPU in this example is 512 steps/2048 bytes according to (1) in this section.
  • Page 241 MEMORIES AND FILES HANDLED BY CPU MODULE 3) Calculation result Table5.15 Memory capacity calculation result File name File capacity Memory capacity 512 steps PARAM.QPA 564 bytes (2048 bytes) Sequence program capacity 525 steps Allocate memory for online 1536 steps MAIN.QPG 500 steps program change (6144 bytes)

  • Page 242: Chapter6 Functions

    FUNCTIONS CHAPTER6 FUNCTIONS Function of CPU module is as follows: 6.1 Function List Functions of CPU module are listed in Table6.2. The Nos. in the "CPU module" field correspond to the CPU modules as indicated below. Table6.1 Nos. in "CPU module" field and the corresponding CPU modules CPU module Basic model QCPU High Performance model QCPU...
  • Page 243 FUNCTIONS Table6.2 CPU module function list (Continued) CPU module Reference Item Description section This function sets whether the output to the Q series compatible output module, hybrid I/O module or Error time output mode setting Section 6.8 intelligent function module will be cleared or held when the CPU module results in a stop error.
  • Page 244 FUNCTIONS Table6.2 CPU module function list (Continued) CPU module Reference Item Description section This function provides read/write protection for files Section Password registration stored in the CPU module against access from the GX 6.19.1 Developer. A function to prevent illegal access from external Section Remote password sources with serial communication modules and...
  • Page 245 FUNCTIONS Table6.2 CPU module function list (Continued) CPU module Reference Item Description section This function configures a redundant system including Redundant function two sets of CPU modules, power supply modules, network modules or main base units. This function switches between the control system and standby system (switches the control system to the System switching (between control standby system or the standby system to the control...

  • Page 246: Constant Scan

    FUNCTIONS 6.2 Constant scan (1) Definition of Constant Scan The scan time differs because the processing time differs depending on whether the instruction, which is used in the sequence program, is executed or not. Constant scan is a function to execute the sequence program repeatedly while maintaining the scan time at a constant time.
  • Page 247 FUNCTIONS (3) Setting the constant scanning time The constant scanning time is set at the "PLC RAS" tab screen in the "(PLC) Parameter" dialog box. The constant scanning time can be set within the following range. • For Basic model QCPU 1 to 2000ms (set in 1ms unit) •...
  • Page 248 FUNCTIONS (a) Setting time condition As the constant scan time, set a value that satisfies the following relational expression. (WDT Set Time) > (Constant Scan Set Time) > (Sequence Program maximum Scan Time) If the sequence program scan time is longer than the constant scan setting time, the CPU module detects PRG.
  • Page 249 FUNCTIONS (4) Waiting time from when END processing is executed until next scan starts Sequence program processing is stopped during the waiting time from when the END processing of a sequence program is executed until the next scan starts. Note6.2 (a) When low speed execution type program is executed Note2 Basic...

  • Page 250: Latch Function

    FUNCTIONS 6.3 Latch Function (1) Definition of Latch Functions The values of each High Performance model QCPU device are set back to the default (bit device: OFF and word device: 0) when; • The PLC is powered OFF and then ON •...
  • Page 251 FUNCTIONS (5) Latch range setting Set the latch range in the device of the PLC parameter dialog box on GX Developer. There are two different latch range types: the range where the RESET/L.CLR switch and remote latch clear operation are enabled and the range where they are Basic Note6.3 disabled.
  • Page 252 FUNCTIONS (7) Precautions (a) When local device or device initial value is specified Basic Even if the device has been latch-specified, it will not be latched the when the Note6.4 Note6.4 local device or the device initialization is specified. Note4 (b) Use of battery The device details of the latch range are maintained with the battery attached to the CPU module.

  • Page 253: Setting Of Output (Y) Status When Changing Between Stop And Run

    FUNCTIONS 6.4 Setting of Output (Y) Status when Changing between STOP and (1) Definition When changed from the RUN or other status to the STOP status, the CPU module stores the output (Y) in the RUN status into the PLC and turns all outputs (Y) OFF. The status after transition from STOP to RUN can be selected from the following two options with the CPU module.
  • Page 254 FUNCTIONS (3) Processing (a) Output (Y) status prior to STOP is output (Default) After the output (Y) status before the STOP status is output, the sequence program calculations are performed. (b) Output is cleared All outputs (Y) are cleared. The output (Y) is provided after execution of sequence program operation. STOP status RUN status NO (Output is cleared)
  • Page 255 FUNCTIONS (4) Setting the Output (Y) Status when Changing from STOP Status to RUN Status Set the output (Y) status when changing from the STOP status to the RUN status in the PLC system of the PLC parameter dialog box. Output mode at STOP to RUN Diagram 6.9 PLC system screen...

  • Page 256: Clock Function

    FUNCTIONS 6.5 Clock Function (1) Definition of Clock Function The clock function reads the internal clock data of the CPU module to use it for time management. The clock data is used by the CPU module system to perform time management, e.g. storage of date into the error history.
  • Page 257 FUNCTIONS (4) Changing and reading the clock data (a) Changing the clock data The clock data can be changed either by GX Developer or program. 1) Method to write from GX Developer When using GX Developer, choose [Online] [Set time] to display the clock setting window, and change the clock data.
  • Page 258 FUNCTIONS (b) Reading Time Data When reading the time data to the data register, use the time data read instruction (DATERD) from the program. The figure below shows an example of a program used to read the clock data with the DATERD instruction and then store it in D10 to D16.
  • Page 259 FUNCTIONS (5) Precautions (a) Initial clock data setting The clock data is not factory-set. The clock data is used by the CPU module system and intelligent function modules for error history, etc. When using the CPU module for the first time, be sure to set the precise time. (b) Clock data correction If part of the clock data is corrected, all data must be written to the CPU module again.
  • Page 260 FUNCTIONS (6) Accuracy of Clock Data The accuracy of the clock function differs with the ambient temperature, as shown below: Table6.6 Accuracy of Basic model QCPU Ambient Temperature (°C) Accuracy (Day difference, S) - 3.2 to + 5.27(TYP.+ 1.98) + 25 - 2.57 to + 5.27(TYP.+ 2.22) + 55 - 11.68 to + 3.65(TYP.- 2.64)

  • Page 261: Remote Operation

    FUNCTIONS 6.6 Remote Operation Remote operation changes the operating status of the CPU module by the operation performed from outside (e.g. GX Developer, external device using MC protocol, link dedicated instruction of MELSECNET/H network module, remote contact). The following four options are available for remote operations: •...
  • Page 262 FUNCTIONS (4) Method with Remote RUN/STOP Remote RUN/STOP operation can be performed either by the RUN contact or by GX Developer, external device using MC protocol, or link dedicated instruction of MELSECNET/H network module. (a) Method with RUN contact The RUN contact is set at the PLC system tab screen in the (PLC) Parameter dialog box of GX Developer.
  • Page 263 FUNCTIONS (b) Method by GX Developer or external device using MC protocol RUN/STOP of the CPU module can be executed by performing remote RUN/ STOP operation with GX Developer or external device using MC protocol. Operate GX Developer by choosing [Online] [Remote operation].
  • Page 264 FUNCTIONS (5) Precautions Take note of the following, because STOP has priority in CPU module: (a) Timing of changing to STOP status The CPU module is put in the STOP status when remote STOP is executed from any of the followings: RUN contact, GX Developer and external device using MC protocol.

  • Page 265: Remote Pause

    FUNCTIONS 6.6.2 Remote PAUSE (1) Definition of Remote PAUSE The remote PAUSE performs PAUSE of the CPU module externally with the CPU module RUN/STOP switch (RUN/STOP/RESET switch for the Basic model QCPU) at RUN position. In the PAUSE status, the CPU module operation is stopped with the ON/OFF states of all outputs (Y) held.
  • Page 266 FUNCTIONS POINT Setting of only the PAUSE contact is not allowed. When setting the PAUSE contact, also set the RUN contact. (b) Method with GX Developer, Serial Communication Module etc. The remote PAUSE operation can be performed from the GX Developer or by using serial communication module.
  • Page 267 FUNCTIONS (4) Precaution (a) When forcibly keeping output ON or OFF To forcibly keep the output ON or OFF in the PAUSE status, provide an interlock with the PAUSE contact (SM204). Y70 ON/OFF is determined with the ON/OFF of the M20 in the PAUSE SM204 status.

  • Page 268: Remote Reset

    FUNCTIONS 6.6.3 Remote RESET (1) Definition of Remote RESET The remote RESET resets the CPU module externally when the CPU module is in STOP status. Even if RUN/STOP switch (RUN/STOP/RESET switch for the Basic model QCPU) is in RUN, the reset can be performed when the CPU module is stopped and an error that can be detected by the self-diagnosis function occurs.
  • Page 269 FUNCTIONS (4) Precautions (a) Setting for remote RESET To perform the remote RESET, check the "Allow" check box of the "Remote reset" section at the "PLC system" tab screen in the "(PLC) Parameter" dialog box, and then write parameters into CPU module. If the "Allow"...
  • Page 270 FUNCTIONS 3) WDT error has occurred in standby system in backup mode If a WDT error has occurred in the standby system, the standby system is not reset when remote RESET is executed for the control system. In this case, perform remote RESET in the following path (communication path where the tracking cable is not relayed).
  • Page 271 FUNCTIONS POINT 1. If remote RESET is performed with the CPU module stopping due to an error, note that the CPU module is placed in the operation status set by the RUN/ STOP switch (RUN/STOP/RESET switch for the Basic model QCPU) upon completion of the reset processing.

  • Page 272: Remote Latch Clear

    FUNCTIONS 6.6.4 Remote latch clear (1) Definition of Remote Latch Clear Remote latch clear resets the latched device data from GX Developer or similar device when the CPU module is in the STOP status. (2) Applications of remote latch clear Remote latch clear is useful when the CPU module is in the following areas.
  • Page 273 FUNCTIONS (c) Devices that are reset at execution of remote latch clear Devices that are not latched are cleared when the remote latch clear is performed. • When remote latch clear is executed, the failure history storage memory data are handled as described in Table6.11. Table6.11 Failure history storage memory data at execution of remote latch clear CPU module Failure history storage memory data...

  • Page 274: Relationship Of Remote Operation And Cpu's Run/Stop Status

    FUNCTIONS 6.6.5 Relationship of remote operation and CPU's RUN/STOP status (1) Relationship of the Remote Operation and CPU module Switch The CPU module operation status is as shown in Table6.12 with the combination of remote operations to RUN/STOP switch. Table6.12 Relation between RUN/STOP status and remote operation Remote operation RUN/STOP status STOP...

  • Page 275: Input Response Time Selection Of Q Series Modules

    FUNCTIONS 6.7 Input Response Time Selection of Q Series Modules (1) Input response time selection This function changes the input response times of each Q series corresponding module. Table6.13 indicates the modules of which input response time can be changed and the applicable setting times.
  • Page 276 FUNCTIONS (2) Input response time setting Set the input response time in the I/O assignment of the PLC parameter dialog box. 1) Make I/O assignment. 2) Select the Detailed setting button. 3) Set the input response time on the I/O module, intelligent function module detail setting screen.
  • Page 277 FUNCTIONS (3) Reactions (a) Restrictions on GX Developer version and the relevant modules When changing the input response time of the high-speed input module or interrupt module, use GX Developer version indicated in Table6.14. If GX Developer version earlier than the version indicated in Table6.14 is used, the module will operate with the default value of the input response time.

  • Page 278: Error Time Output Mode Setting

    FUNCTIONS 6.8 Error Time Output Mode Setting (1) Error time Output Mode Setting The error time output mode setting is to set whether the output to the Q series corresponding output module, I/O combined module, intelligent function module or interrupt module will be cleared or held when the CPU module results in a stop error. (2) Error time Output Mode Setting Make the error time output mode setting in the I/O assignment setting of the PLC parameter dialog box.

  • Page 279: Hardware Error Time Plc Operation Settings

    FUNCTIONS 6.9 Hardware Error Time PLC Operation Settings (1) Hardware Error time PLC Operation Mode Setting The hardware error time PLC operation mode setting is to set whether the operation of the CPU module will be stopped or continued when a hardware error occurs in the intelligent function module or interrupt module.

  • Page 280: Intelligent Function Module Switch Setting

    FUNCTIONS 6.10 Intelligent Function Module Switch Setting (1) Definition The intelligent function module/interrupt module switch setting is to set the switches of the Q series compatible intelligent function modules using GX Developer. (2) Timing when switch setting is written The specified switch setting is written from the CPU module to the corresponding intelligent function modules and interrupt modules when the PLC is powered on or the CPU module is unreset, i.e., CPU module's RESET switch is set to the neutral position.
  • Page 281 FUNCTIONS (3) Setting the Switches of the Intelligent Function Modules and Interrupt Modules At the "I/O assignment" tab screen in the "(PLC) Parameter" dialog box, specify the desired switch setting. Select "Intelli." in the "Type" column of a slot for which to set the switches of the intelligent function modules and interrupt modules.
  • Page 282 FUNCTIONS (d) Timing when settings are ensured The switch setting of the intelligent function modules and interrupt modules become valid in the following cases. • When the PLC is powered ON and then OFF • When the CPU module's RESET switch is set to the neutral position. 6.10 Intelligent Function Module Switch Setting - 41...

  • Page 283: Monitor Function

    FUNCTIONS 6.11 Monitor Function (1) Definition of Monitoring Function This is a function to read the program, device and intellignet function module status of the CPU module by using GX Developer. Table6.15 Monitor function list and applicable CPU Applicability for CPU modules High Monitor function Reference...

  • Page 284: Local Device Monitor/Test

    FUNCTIONS Basic Note6.7 (3) Monitor with monitor condition setting Note7 By setting the monitor condition on GX Developer for debugging, the CPU module Note6.7 operation status can be monitored under the specified condition. It is also possible to maintain the monitoring status under the specified conditions by setting the monitoring stop conditions.
  • Page 285 FUNCTIONS 6.11.1 Monitor condition settingNote9 Basic Note6.9 Note6.10 Set the monitor condition when executing monitor under the specified condition. (1) Monitor execution condition setting for ladder monitor Choose [Online] [Monitor] [Monitor condition setup] to open the Monitor Condition dialog box. The following shows an example in which to start a monitoring operation at the leading edge of Y70.
  • Page 286 FUNCTIONS (a) When only "Step No." is specified: The monitor data sampled when the status previous to execution of the specified step becomes "the specified". The specification method for the execution status is indicated below: • When changing from non-execution status to executing status : < -P-> •...
  • Page 287 FUNCTIONS POINT 1 . If a step between the AND/OR blocks is specified as a monitor condition, monitor data is sampled when the status previous to execution of the specified step is specified by the LD instruction. The monitor timing depends on the step specified as a monitor condition.
  • Page 288 FUNCTIONS (b) When only Device is specified: Word Device or Bit Device can be specified. 1) When Word Device is selected: The monitor data is sampled is when the current value of the specified word device becomes the specified value. Type a current value in decimal digits or hexadecimal digits.
  • Page 289 FUNCTIONS (2) Monitor Stop Condition Set Up Choose [Online] [Monitor] [Monitor stop condition setup] to open the [Monitor Stop Condition] dialog box. Diagram 6.33 shows an example of stopping a monitoring operation at the leading edge of Y71. Diagram 6.33 Monitor stop condition screen (a) When "Step No."...
  • Page 290 FUNCTIONS (3) Precautions (a) Monitored CPU module file When monitoring after setting the monitor condition, the file displayed on GX Developer is monitored. Choose [Online] [Read from PLC] on GX Developer, and match the file name of the CPU module to be monitored with the file name on GX Developer. (b) When there is no file register setting When monitoring the file register which is not specified, 0 is displayed.
  • Page 291 FUNCTIONS 6.11.2 Local device monitor/testNote10 Basic Note6.10 Local devices specified at the Device tab screen in the (PLC) Parameter dialog box can be monitored or tested by operating from GX Developer. This function is useful when debugging a program and monitoring local devices in a program monitored by GX Developer.
  • Page 292 FUNCTIONS If the local device monitor setting is made and Program "B" is displayed, for example, this makes it possible to monitor the local devices in Program "B". CPU module Program execution (A MOVP K2 D0 Program: A MOVP K3 D99 MOVP K4 D0 Program: B MOVP K8 D99...
  • Page 293 FUNCTIONS (2) Monitoring the Local Devices Monitor local devices in the following steps: Connect the personral computer to the CPU module. Display the circuit in the circuit mode. Change the mode to the monitor mode. Choose [Tools] [Options]. Display option window Change to the option Select <Each program>...

  • Page 294: Enforced On/Off Of External I/O

    FUNCTIONS High 6.11.3 Enforced ON/OFF of external I/ONote11 Performance Note6.11 Enforced ON/OFF operations from GX Developer will forcibly switch the external I/O on and off. The information registered for ON/OFF will be cancelled with GX Developer operations. Diagram 6.36 Forced input output registration/cancellation screen Note11 High Performance...
  • Page 295 FUNCTIONS (1) Operation performed at enforced ON/OFF It is possible to perform enforced ON (Set forced ON) enforced OFF (Set forced OFF) and cancel enforced ON/OFF (Cancel it) with the enforced ON/OFF Basic Note6.12 function. Note12 The operations for performing enforced ON, enforced OFF and canceling enforced Note6.12 ON/OFF are shown in Table6.17.
  • Page 296 FUNCTIONS The operations when enforced ON/OFF is performed are shown in Diagram 6.37. Y10 device Output enforced ON/OFF operations enforced OFF Y10 output External output Output refreshed (OFF) (Y10 OFF) Input refreshed X0 input External input (ON) (X0 ON) Input enforced ON/OFF operations X0 device enforced OFF Sequence execution...
  • Page 297 FUNCTIONS (2) Explanation of specifications (a) CPU module status for which enforced ON/OFF can be executed Enforced ON/OFF can be performed regardless of the CPU module is RUN/STOP status. However, enforced ON/OFF is only allowed for input during stop errors. The output is only performed to device Y.
  • Page 298 FUNCTIONS Basic Note6.15 (d) Canceling ON/OFF registration information Note15 ON/OFF registration information can be canceled from GX Developer. Devices for Note6.15 which enforced ON/OFF has been performed will assume the following statuses when ON/OFF registered information has been cancelled. Table6.18 Device statuses after ON/OFF registration information is canceled ON/OFF performed with ON/OFF not performed with Enforced ON/OFF device...
  • Page 299 FUNCTIONS (e) Enforced ON/OFF timing for external I/O The timing for external I/O enforced ON/OFF is shown in Table6.19. Table6.19 Enforced ON/OFF timing Refresh area Input Output • During END processing (input refresh) • During END processing (output refresh) • During the execution of commands that •...
  • Page 300 FUNCTIONS Basic Note6.18 (3) Operation procedure Note18 The operation procedure is explained below. Note6.18 • Register enforced ON/OFF for the specified device. [Online] [Debug] [Forced input output registration/cancellation] • It is possible to perform enforced ON or enforced OFF for a specified device by selecting [Set forced ON] or [Set forced OFF] after the device has been specified on the [Registration forced ON/OFF] setup screen.
  • Page 301 FUNCTIONS (4) Precautions for using the Redundant CPU (a) Systems to be registered/canceled When the Redundant CPU is used, register/cancel the enforced I/O for the control system. (Enforced I/O cannot be registered/canceled for the control system and standby system individually.) After system switching, register/cancel the enforced I/O for the new control system (system that was changed from the standby system to the control system by system switching).

  • Page 302: Writing In Program During Cpu Module Run

    FUNCTIONS 6.12 Writing in Program during CPU Module RUN When the High Performance model QCPU is in the RUN status, you can write programs or files in any of the steps shown in Table6.21. Table6.21 Write during RUN types CPU module Write during RUN type •...
  • Page 303 FUNCTIONS Also, write during RUN is enabled from GX Developer connected to another station on the network. GX Developer MELSECNET/H PLC to PLC network Change by GX Developer and write in CPU module at the conversion. Diagram 6.40 Outline of write during RUN via network 6.12 Writing in Program during CPU Module RUN - 62 6.12.1 Write during RUN in ladder mode...
  • Page 304 FUNCTIONS (2) Precautions Take a note of the following when writing during RUN: (a) Memory enabled for write during RUN The memory that can be written during RUN is only program memory. (b) Write during RUN performed during boot run Operation is performed as described in Table6.22 when write during RUN is performed during boot run.
  • Page 305 FUNCTIONS (d) Write during RUN performed during execution of low speed execution type Note6.20 program Note20 Basic Redundant When a low speed execution type program is being executed, the RUN write is Note6.20 started once the low speed execution type program is complete. Also, the low speed execution is stopped temporarily during a RUN write.
  • Page 306 (Control is suspended for the period of time indicated in Table6.23.) Table6.23 Scan time increased when allocate memory for write during RUN are re-set Step for Write During RUN CPU Type If Not Changed If Assigned Again Q00JCPU Max. 2.1ms Max. 30ms Q00CPU Max. 1.7ms Max. 26ms Q01CPU Max.
  • Page 307 FUNCTIONS (g) Instructions that do not operate normally at write during RUN When any of the following instructions is written by write during RUN, the following will not operate correctly. Execute write during RUN after confirming it will not affect the safety. The following operation of the trailing edge instruction can be prevented from occurring by using the EGF instruction.

  • Page 308: File-Write During Run

    FUNCTIONS 6.12.2 File-write during RUNNote22 Basic Note6.22 (1) File-Write During RUN function The file-write during RUN function is used to write a batch of files to the CPU module as shown in Table6.24. Table6.24 Files enabled for file-write during RUN Memory Built in CPU module Memory Card (ROM)
  • Page 309 FUNCTIONS (2) Precautions The precautions for file-write during RUN are as follows. (a) Condition under which program file-write during RUN can be executed The file-write during RUN can be executed when any of the following conditions is met. 1) Program memory •...
  • Page 310 FUNCTIONS (e) Instructions that do not operate normally during file-write during RUN If a sequence program file being executed is written when the CPU module is in the RUN status, the following will not operate correctly. Execute write during RUN after confirming it will not affect the safety. The following operation of the trailing edge instruction can be prevented from occurring by using the EGF instruction.

  • Page 311: Execution Time Measurement

    FUNCTIONS 6.13 Execution Time Measurement (1) Definition This is a function to display the processing time of the program being executed. (2) Applications and types of execution time measurement This is used to find out the effect of each program's processing time on the total scan time.
  • Page 312 FUNCTIONS Note6.25 (a) Total Scan Time Note25 Basic Redundant The monitor time set in WDT(the watchdog timer) of "PLC RAS" tab screen in the Note6.25 (PLC) "Parameter" dialog box and total scan time for each program type are displayed. 1) Monitor Time Indicates the monitor time of each program.
  • Page 313 FUNCTIONS (c) Execution status of each program The execution status of program specified at the Program tab screen in the (PLC) Note6.27 Parameter dialog box is displayed. Note27 Basic 1) Program Note6.27 The program name is displayed in the order set in the parameter. 2) Execute The program type set in the parameter is displayed.
  • Page 314 FUNCTIONS Note6.28 (3) Startup program Note28 Basic Program can be started on the program list monitor screen. Note6.28 Clicking the button displays the following dialog box. Startup program Diagram 6.44 Startup program screen (a) Program name Select the program set in the program setting of the PLC parameter dialog box. A program name cannot be entered as desired.
  • Page 315 FUNCTIONS Note6.30 (4) Stop program Note30 Basic Program can be stopped on the program list monitor screen. Note6.30 Clicking the Stop program button on the program list monitor screen ( (2) in this section) displays the following dialog box. Diagram 6.45 Stop program screen (a) Program name Select the program set in the program setting of the PLC parameter dialog box.
  • Page 316 FUNCTIONS POINT Depending on the instruction, the output may not turn OFF if "After stop, output stop" is executed. For details, refer to the section of the POFF instruction in the following manual. QCPU (Q Mode)/QnACPU Programming Manual (Common Instructions) (5) Precaution The scan time of a constant scan execution type program being executed is not displayed on screen, but a dash (-) is displayed in the Scan Time column.

  • Page 317: Interrupt Program Monitor List

    FUNCTIONS 6.13.2 Interrupt program monitor list (1) Definition of Interrupt Program Monitor List This function displays execution count of the interrupt program. This is used to confirm the execution status of the interrupt program. (2) Using the Interrupt Program Monitor List Choose [Online] [Monitor] [Interrupt program monitor list].

  • Page 318: Scan Time Measurement

    FUNCTIONS 6.13.3 Scan time measurementNote32 Basic Note6.32 (1) Definition of Scan Time Measurement This function displays the set program interval processing time. The time for the subroutines and interrupt program can be measured as well. (2) Scan time measurement range designation To specify a scan time measurement range, follow either of the following two steps: •...
  • Page 319 FUNCTIONS • The scan time measurement range is specified. (The specified area is highlighted.) Diagram 6.48 Measurement range designation • Choose [Online] [Monitor] [Scan time measurement] to open "Scan time Measurement" dialog box. • Click on the button. Start Diagram 6.49 Scan time measurement window 6.13 Execution Time Measurement - 78 6.13.3 Scan time measurement...
  • Page 320 FUNCTIONS (6) Precautions (a) When measurement range is set Set the "Measurement limit" so that the value of "Start step" is larger than that of "End step". (b) Measurement of scan time across program files The scan time to skip to another program file cannot be measured. (c) When measurement time is less than 0.100ms If the measurement time is less than 0.100 ms, 0.000 ms is displayed.

  • Page 321: Sampling Trace Function

    FUNCTIONS 6.14 Sampling Trace FunctionNote33 Basic Note6.33 (1) Definition of Sampling Trace Function?Note34 This function samples the device continuously on the High Performance model QCPU at specified timings. The sampling trace samples the contents of the specified device at a set interval (sampling cycle), and stores the trace results at the sampling trace file in the memory card.
  • Page 322 FUNCTIONS POINT 1. The SRAM card is required to store the trace data and trace results. After mounting the SRAM card to the High Performance model QCPU, execute sampling trace. 2. Sampling trace is not executed if the Flash card or ATA card is installed, because the cards cannot store the trace data and trace results.
  • Page 323 FUNCTIONS (b) When sampling trace is completed After the sampling trace is completed, SM805 (sampling trace complete) is turned Trigger condition Trace ends by number enabled Trace start request of trace after trigger Number of trace after trigger Number of all traces SM800 (Sampling trace ready) SM801...
  • Page 324 FUNCTIONS (c) Sampling trace interrupt When SM801 (sampling trace start) is turned off during sampling trace, the sampling trace is interrupted. When sampling trace is interrupted, the number of traces is cleared. When turning on SM801 again, trace is restarted. Trigger SM801 SM801...
  • Page 325 FUNCTIONS (4) Operation procedure The following methods are available as the sampling trace operation procedure. • Use the wizard ( GX Developer Operating Manual) • Make detailed settings individually. ( as follows) Perform each operation from the [Online] [Trace] [Sampling trace...] from the menu bar.
  • Page 326 FUNCTIONS (b) Setting the Trace Condition Click the button on the Sampling trace screen and set the Trace condition setting trace conditions. The trace condition setting can set to No. of traces, Trace point setup, Trigger point setup, and trace Additional information. Diagram 6.54 Trace condition setting 1) No.
  • Page 327 FUNCTIONS 2) Trace Point Setup This sets the timing to collect trace data. Select one from the following: • Each Scan Collects trace data for every scan (END processing). • Interval Collects trace data at specified times. • Detailed Sets the device and step no. The setting method and trace data sampling timing is the same as mentioned in section Section 6.11.1, (when setting the monitor condition.) The devices that can be set in the detailed condition are as follows:...
  • Page 328 FUNCTIONS (c) Trace data Setting Select "Individual setting/execution" on the Sampling trace screen. Click the button and set the devices to which sampling trace Trace data setting will be executed. Diagram 6.56 Trace data setting screen 1) Bit Device Maximum of 50 bit devices can be set as follows. •...
  • Page 329 FUNCTIONS (d) Write of trace data and trace condition The created trace data and trace condition is written to the memory card. The trace file is written to the memory card. Use the button on the Sampling trace screen to write the trace file Write to PLC to the memory card (SRAM card).
  • Page 330 FUNCTIONS (f) Trace result display Read the trace results form the CPU module and display the data. • Click the button on the Sampling trace execution Trace result PLC read screen to read the trace result from the CPU module. •...
  • Page 331 FUNCTIONS (5) Precautions (a) Requirements to execute sampling trace SRAM card is required for sampling trace. Set the sampling trace file in the memory card (SRAM). (b) Areas where sampling trace can be executed The sampling trace can be executed from other station on the network or serial communication module.

  • Page 332: Debug Execution By Multiple Users

    FUNCTIONS 6.15 Debug Execution by Multiple Users (1) Debug Execution by Multiple Users This function performs debugging from multiple GX Developer connected to CPU module or Serial communication module at the same time. When a file has been divided according to the process, function, etc., the divided files Basic Note6.34 can be debugged simultaneously from multiple GX Developer.

  • Page 333: Simultaneous Monitoring Execution By Multiple Users

    FUNCTIONS 6.15.1 Simultaneous monitoring execution by multiple users (1) Simultaneous monitoring execution by multiple users The CPU module, serial communication module or similar module can be simultaneously monitored by multiple GX Developer, when they are connected. GX Developer GX Developer Monitor target GX Developer Diagram 6.60 Simultaneous monitor...
  • Page 334 FUNCTIONS (2) Operation Procedure For multi-user monitoring operation, create a user-defined system file in the following steps. • Choose [Online] [Format PLC memory] on GX Developer to display the PLC memory format window. • Select "Program memory/device memory" from the "Target Memory list box". •...
  • Page 335 FUNCTIONS (3) Precautions Basic Note6.37 (a) Monitor condition setting Note38 Monitor condition setting can be made by only one GX Developer. Note6.37 (b) Necessity of system area setting If the user setting system area is not created, simultaneous monitor from other stations can be executed, but the monitor speed decreases.

  • Page 336: Simultaneous Write During Run By Multiple Users

    FUNCTIONS 6.15.2 Simultaneous write during RUN by multiple usersNote39 Basic Note6.38 (1) Simultaneous write during RUN by multiple users Run write can be simultaneously executed to one or more files by multiple users Personal computer A Personal computer B (GX Developer) (GX Developer) Diagram 6.62 Simultaneous write during RUN by multiple users (2) Operation Procedure...
  • Page 337 FUNCTIONS • Set Write during RUN and set the Write during RUN method. 1) Set Write during RUN (while PLC is runnning) in "After conversion writing behavior". 2) Select Absolute step No. (default) or "Relative step No. by pointer" in "Step No. specification used in writing".

  • Page 338: Watchdog Timer (Wdt)

    FUNCTIONS 6.16 Watchdog Timer (WDT) (1) Definition of Watchdog Timer (WDT) The watchdog timer is an internal sequence timer to detect CPU module hardware and sequence program error. (2) Watchdog Timer Setting and Reset (a) Watchdog timer setting The watchdog timer setting can be changed at the "PLC RAS" tab screen in the "(PLC) Parameter"...
  • Page 339 FUNCTIONS (4) Precautions (a) Watchdog timer error An error of 0 to 10 ms occurs in the measurement time of the watchdog timer. Set the watchdog timer for a desired value by taking such an error into account. (b) Watchdog timer reset when program is executed repeatedly by FOR and NEXT instructions The watchdog timer can also be reset by executing the WDT instruction in a sequence program.
  • Page 340 FUNCTIONS (c) Scan time when WDT instruction is used The scan time value is not reset even if the watchdog timer is reset in the sequence program. The scan time value is measured to the END instruction. Internal Internal Sequence program processing time processing time Scan execution...

  • Page 341: Self-Diagnostics Function

    FUNCTIONS 6.17 Self-diagnostics Function (1) Definition of Self-Diagnosis Function The self-diagnosis is a function performed by the High Performance model QCPU itself to diagnose whether there is an error in the CPU module. The self-diagnosis function is used to prevent the CPU module erroneous operation as well as preventive maintenance.
  • Page 342 FUNCTIONS (4) Error history checking The CPU module stores 16 latest error codes. ( Section 6.18) The failure history can be checked in the GX Developer function PLC diagnostics mode. The failure history can be stored even when the power is shut off using the battery backup.
  • Page 343 FUNCTIONS (b) Errors that can be set to continue/stop the operation The following errors can be set to "continue/stop" the operation when they have occurred. 1) Errors that can be set to continue/stop the operation in PLC RAS setting of PLC parameter dialog box •...
  • Page 344 FUNCTIONS (7) Self-diagnostics list Table6.29 shows the details of self diagnostics performed by CPU module. The error message in the "Error message" field given in Table6.29 can be checked by choosing [Diagnostics] [PLC diagnostics] on GX Developer. The No. in the "CPU module" field corresponds to the CPU module as indicated below.
  • Page 345 FUNCTIONS Table6.29 Self-dianostics list (Continued) LED status CPU module CPU module Diagnosics Error message Diagnostics timing status ERR. • When the CPU module is powered on/reset • When FROM/TO instruction is executed Intelligent function STOP/ SP.UNIT DOWN • When intelligent OFF/ON Flicker/ON Continue...
  • Page 346 FUNCTIONS Table6.29 Self-dianostics list (Continued) LED status CPU module CPU module Diagnosics Error message Diagnostics timing status ERR. • When the memory Memory card operation STOP/ ICM.OPE. ERROR card is installed/ OFF/ON Flicker/ON error *1 Continue removed • When the CPU File setting error FILE SET ERROR module is powered...
  • Page 347 FUNCTIONS Table6.29 Self-dianostics list (Continued) LED status CPU module Diagnosics Error message Diagnostics timing module ERR. status • When an OPERATION STOP/ instruction is OFF/ON Flicker/ON Operation error ERROR Continue executed FOR to NEXT • When an FOR NEXT instruction structure instruction is STOP Flicker...
  • Page 348 FUNCTIONS Table6.29 Self-dianostics list (Continued) LED status CPU module Diagnosics Error message Diagnostics timing module ERR. status • Always • When the CPU module is powered Program, parameter, on/ reset DIP switch FILE DIFF. Stop Flicker • When tracking mismatch cable is connected •...
  • Page 349 FUNCTIONS Table6.29 Self-dianostics list (Continued) LED status CPU module Diagnosics Error message Diagnostics timing module ERR. status Tracking data TRK.TRANS. • Always Continue transmission error ERR. • When END Tracking capacity TRK.SIZE instruction is Continue excess error ERROR executed Tracking cable fault, •...
  • Page 350 FUNCTIONS Table6.29 Self-dianostics list (Continued) LED status CPU module Diagnosics Error message Diagnostics timing module ERR. status Control system not CONTROL • Always Stop Flicker started/stop error SYS.DOWN • When program Program memory PRG.MEM. memory copy Stop Flicker cleared CLEAR function is executed Redundant...
  • Page 351 FUNCTIONS POINT In the case of the Redundant CPU, the information of the error that occurred in the other system is stored into the special relay (SM1610 to 1626) and special register (SD1610 to 1636). In any of the following cases, the other system error information is not stored. •...

  • Page 352: Interrupt Due To Error Occurrence

    FUNCTIONS 6.17.1 Interrupt due to error occurrenceNote43 Basic Note6.42 The CPU module can execute the interrupt program of the interrupt pointer that is set as the interrupt object when an error occurs. (1) Interrupt caused by the error that can be set to continue/stop in PLC RAS setting Only when the error set to "continue"...
  • Page 353 FUNCTIONS (3) Precautions (a) Precautions for using the interrupt program of interrupt pointer I41 I41 is an interrupt pointer used when system switching from control system to standby system occurs. Note the following points for the I41 interrupt program since it is executed by the new standby system (system that was changed from the control system to the standby system by system switching) after system switching from control system to standby system.

  • Page 354: Led Display At The Time Of Error Occurrence

    FUNCTIONS 6.17.2 LED display at the time of error occurrence When an error occurs, the LED located on the front of the CPU module turns on / flickers. Section 6.21) 6.17.3 Error Clear CPU module error clear operation can be performed only for error that can continue the CPU module operation.
  • Page 355 FUNCTIONS POINT 1. When error cancellation is performed by storing the code of the error to cancel is stored in SD50, the lower 2 digits of the code number is ignored. [Example] When the error codes 2100 and 2101 occur, canceling the error code 2100 will also cancel the error code 2101.

  • Page 356: Error History

    FUNCTIONS 6.18 Error History The CPU module can store the error history (results detected from the self-diagnosis function and the time) in the memory. The error history can be checked by choosing [Diagnostics] [PLC diagnostics] on GX Developer. POINT The detection time uses the CPU module internal clock, so make sure to set the correct time when using the CPU module for the first time.

  • Page 357: High Performance Model Qcpu, Process Cpu, Redundant Cpu

    FUNCTIONS 6.18.2 High Performance model QCPU, Process CPU, Redundant CPU (1) Storage Area The latest 16 errors are stored in the latched CPU module error history storage memory. When storing more than 17, the history can be stored in the memory card file using PLC RAS setting in the "(PLC) Parameter"...

  • Page 358: System Protect

    FUNCTIONS 6.19 System Protect The CPU model has a few protection functions (system protect) to prevent the program changes by a third party other than the designer (from GX Developer function or serial communication module). Note45 Table6.31 System protect types Valid Item to protect Protect valid file...

  • Page 359: Password Registration

    FUNCTIONS 6.19.1 Password registration Password is used to prohibit reading and writing data of the program and comments in CPU module from GX Developer. (1) Valid password range The read- and rewrite-prohibited range is set for the specified memory (program memory/standard memory/memory card) program file, device comment file, and Basic Note6.46...
  • Page 360 FUNCTIONS (3) Password registration Register the password on the Password registration/change screen of GX Developer. To display the Password registration/change screen, choose [Online] [Password Password setup setup] on GX Developer and click the button on the Write to PLC screen. Diagram 6.67 Password registration/change screen Each item is described below: (a) Target memory...
  • Page 361 FUNCTIONS (4) Precautions The password registered to a file can not read out from the file. If the password can not be remembered, file operation other than following can not be performed. Take notes of the password registered and keep it on hand. (a) For Basic model QCPU •...

  • Page 362: Remote Password

    FUNCTIONS 6.19.2 Remote passwordNote48 Basic Note6.47 (1) Definition High Performance The remote password prevents illegal access to the CPU module by users in remote locations. Note6.47 After remote passwords have been set, a remote password check is performed when the CPU module is accessed from users in remote locations. (2) Flow from remote password setting to reflection Set the remote password using GX Developer and write it to the CPU module.
  • Page 363 FUNCTIONS (3) Modules that support remote password setting The following modules support remote password setting. • Serial communication module • Ethernet module • Modem interface module (4) Remote password lock/unlock processing Unlock the remote password of the serial communication module via a modem or that of the Ethernet module via Ethernet.
  • Page 364 FUNCTIONS (5) Number of remote password-set modules The number of remote password-set modules changes depending on the version of used GX Developer. Table6.32 indicates the number of remote password-set modules depending on the GX Developer version. Table6.32 Number of set modules according to GX Developer version Maximum Number GX Developer Version Module Name...
  • Page 365 FUNCTIONS (6) Remote password setting, changing and canceling procedures (a) Remote password setting • In the project data list of GX Developer, choose [Parameter] [Remote pass] to display the Remote password setting screen. Set the remote password. Remote password setup Detail is required with the QJ71E71 Diagram 6.70 Remote password setting screen...
  • Page 366 FUNCTIONS • Connect GX Developer to the CPU module. Write the set remote password to the CPU module. Redundant When a multiple CPU system is configured, write the remote password to the Note6.48 Note6.48 control CPU of the module to which the remote password is set. Note49 •...
  • Page 367 FUNCTIONS Remark Refer to the following manuals for further details on the remote password function. • When using Serial Communication Modules Q Corresponding Serial Communication Module Users' Manual (Application) • When using Ethernet Modules Q Corresponding Ethernet Interface Module Users' Manual (Basic) •...

  • Page 368: Cpu Module System Display By Gx Developer

    FUNCTIONS 6.20 CPU Module System Display by GX Developer After GX Developer is connected to the CPU module, the following items can be checked in the system monitor (see Diagram 6.71 and Diagram 6.72). • Installed status • Parameter status •...
  • Page 369 FUNCTIONS (1) Installed status Enables the controlling CPU, the model an07 d the number of modules mounted onto Basic Note6.50 the selected base unit to be confirmed. "Not installed" will be displayed for slots in which modules have not been mounted. Note6.50 When slots have been set as "Empty"...
  • Page 370 FUNCTIONS (6) Module' s detailed information This function is used to confirm the detailed information for selected modules. Refer to the instruction manual for details on the relevant intelligent function module and intelligent function modules. (7) Base information Enables the "Overall Information" and "Base Information" to be confirmed. (a) Overall information Enables the number of base units in use and the number of modules mounted on the base units to be confirmed.
  • Page 371 FUNCTIONS (10)Memory copy status Indicates the execution progress of the memory copy from control system to standby system. • During normal operation • When memory copy is executed from control system to standby system • When tracking cable is faulty Diagram 6.74 Memory copy status (11)Other system status Indicates the status of the other system.

  • Page 372: Led Display

    SYSTEM A USER SYSTEM B BAT. BOOT 1) : Basic model QCPU (Q00JCPU) 2) : Basic model QCPU (Q00CPU, Q01CPU) 3) : High Performance model QCPU, Process CPU 4) : Redundant CPU Diagram 6.76 LED on CPU module front Remark Refer to the following manual for details of the LED indications.

  • Page 373: Method To Turn Off The Led

    FUNCTIONS 6.21.1 Method to turn off the LED (1) Method to turn off the LED (a) For Basic model QCPU To turn off the ERR. LED that is on, remove the cause of the error and then operate the special relay SM50 and special register SD50 to cancel the error. (This does not apply to reset operation.) (b) For High Performance model QCPU, Process CPU, Redundant CPU The LED that is on can be turned off by the following operation.

  • Page 374: Priority Setting

    FUNCTIONS 6.21.2 Priority setting This section explains the priority setting for the error messages shown on the display at error occurrence. (1) Displayed error messages and their priorities When multiple factors that can be displayed occur, the display is performed with the following conditions: •...
  • Page 375 FUNCTIONS (2) Priorities and factor Nos. The description and default priority for the factor Nos. to be set in the special registers SD207 to 209 are as follows: Refer to Appendix 2 for the special registers SD207 to 209. Note53Note54Note55 Basic Table6.35 List of default factor Nos.
  • Page 376 FUNCTIONS POINT 1. When leaving the LED turned off at the error described above, set the factor No. setting area (each 4 bits), which stores the factor No. corresponding to SD207 to 209 to "0". [Example] To leave the ERR. LED off when a fuse shutoff error is detected, set the factor No.

  • Page 377: High Speed Interrupt Function

    FUNCTIONS 6.22 High Speed Interrupt FunctionNote56 Note57 Basic Note6.55 When an interrupt program is created using the interrupt pointer I49, the QnHCPU can run Process a program by making high speed, fixed-cycle interrupts at intervals of 0.2ms to 1.0ms. And, the QnHCPU improves the I/O response by refreshing the I/O signals and intelligent Note6.55 function module buffer memories in the parameter-set ranges before and after the Redundant...
  • Page 378 FUNCTIONS (1) Compatible CPUs Table6.36 CPU modules compatible with high speed interrupt function Compatible CPU Remarks modules Q02HCPU, Q06HCPU, There are restrictions on CPU module versions ( Appendix Q12HCPU, Q25HCPU 3.2(2)) (2) Specifications of high speed interrupt function Table6.37 Specifications of high speed interrupt function Item Description Remarks...
  • Page 379 FUNCTIONS 6.22.1 High speed interrupt program executionNote58Note59 Basic Note6.57 The high speed interrupt program execution function is designed to run an interrupt Process program according to the setting of high speed interrupt pointer I49. Note6.57 (1) Setting method Redundant Set the high speed interrupt pointer I49 at "High speed interrupt I49 fixed scan interval"...

  • Page 380: High Speed Interrupt Program Execution

    FUNCTIONS (c) High speed interrupt program execution This function is executed when the following conditions are all satisfied. • When the EI instruction is being executed • When the CPU module is in the RUN status • When I49 is not masked by the IMASK instruction By default, I49 is not masked by the IMASK instruction.

  • Page 381: High Speed I/O Refresh, High Speed Buffer Transfer

    FUNCTIONS 6.22.2 High speed I/O refresh, high speed buffer transferNote60Note61 Basic Note6.59 High speed I/O refresh is a function that updates I/O signals between the I/O and Process intelligent function modules and CPU module at interrupt cycle intervals. High speed buffer transfer is a function that updates data between the intelligent function Note6.59 module buffer memories and CPU module devices at interrupt cycle intervals.
  • Page 382 FUNCTIONS (b) High speed buffer transfer setting Set the buffer memory transfer ranges. Diagram 6.83 High speed buffer transfer setting screen Table6.39 High speed I/O refresh setting and high speed buffer transfer setting Number of Item Sub Item Contents Restrictions Settings Head device No.
  • Page 383 FUNCTIONS (2) Execution of this function This function is executed when the following conditions are all satisfied. • When the EI instruction is being executed • When the CPU module is in the RUN status • When I49 is not masked by the IMASK instruction By default, I49 is not masked by the IMASK instruction.

  • Page 384: Processing Times

    FUNCTIONS 6.22.3 Processing timesNote62Note63 Basic Note6.61 The following chart shows the processing times of the high speed interrupt function from a Process start to an end. Main routine program Note6.61 Redundant Waiting time Note6.61 High High speed interrupt start Performance Input (X) Note6.62 Buffer memory read...
  • Page 385 FUNCTIONS Table6.40 Processing times related to high speed I/O refresh and high speed buffer transfer Processing Item Processing Time • Max. 37.5 s or more than 37.5 s instruction processing time Waiting time • Max. 40 s when MELSECNET/H, CC-Link or intelligent function modules are mounted on extension base unit.

  • Page 386: Restrictions

    FUNCTIONS 6.22.4 RestrictionsNote64Note65 Basic Note6.63 This section provides the cautions when executing the high speed interrupt function and Process the restrictions. Depending on the cautions, an WDT error may occur, or high speed interrupt may not be Note6.63 executed at preset cycle intervals. Redundant The items are classified into 4 types depending on the restriction level.
  • Page 387 FUNCTIONS Table6.41 Items that are completely disabled (Continued) Item Restriction When Used Since interrupt is disabled during online program correction, a high speed interrupt start is delayed during that period and therefore high Online program correction, Online program correction is not available. speed interrupt is not available at preset cycle.
  • Page 388 FUNCTIONS (3) Items that have priorities over the high speed interrupt when interrupt is disabled Table6.43 Items that hold high speed interrupt by interrupt disable Item Precaution Instruction Interrupt is disabled during instruction execution. Interrupt is disabled during refresh (bus access). Link refresh For MELSECNET/H, CC-Link or intelligent function module refresh, waiting time is max.

  • Page 389: Interrupt From The Intelligent Function Module

    FUNCTIONS 6.23 Interrupt from the Intelligent Function ModuleNote66 Basic Note6.65 CPU module executes an interrupt program (I ) by the interrupt request from the intelligent function module. For example, the serial communication module processes the data reception by an interrupt program when the following data communication functions are executed. •Data reception during the communication with no handshaking protocol •Data reception during the communication with bi-directional protocol Processing data reception with an interrupt program improves the data reception speed of...

  • Page 390: Serial Communication Function

    2. The serial communication function is not used for connection of GX Developer or GX Configurator and CPU module. Note67 Basic The Q00JCPU does not support the serial communication function. Note6.66 Note68 High Redundant...
  • Page 391 FUNCTIONS (2) Specifications (a) Transmission specifications Table6.44 indicates the transmission specifications of RS-232 used for the serial communication function of the CPU module. Use the serial communication function after making sure that the specifications of the personal computer, Display device or the like match those of Table6.44. Table6.44 Transmission specifications of serial communication function Item Default...
  • Page 392 FUNCTIONS (b) RS-232 connector specifications Table6.46 indicates the applications of the RS-232 connector of the CPU module. Table6.46 RS-232 connector specifications Appearance Pin No. Signal Symbol Signal Name RD (RXD) Receive data SD (TXD) Send data Signal ground ------ ------ Mini-Din 6 pins DSR (DR) Data set ready...
  • Page 393 FUNCTIONS (3) Functions The serial communication function allows the MC protocol commands in Table6.47 to be executed. Refer to the following manual for details of the MC protocol. Q-Compatible MELSEC Communication Protocol Reference Manual Table6.47 List of MC protocol commands supported by serial communication function Function Command Processing...
  • Page 394 FUNCTIONS (4) Accessible devices Table6.48 Devices that can be accessed by serial communication function Device Number Range Class Device Device Code Write Read (Default Value) Function input 000000 to 00000F Hexadecimal Function output 000000 to 00000F Hexadecimal Internal Function register 000000 to 000004 Decimal system device...
  • Page 395 FUNCTIONS (5) Setting of transmission specifications Use the serial communication setting PLC parameters to set the transmission speed, sum check, transmission wait time and write during RUN setting of the serial communication function. • When using the serial communication function to make communication with the personal computer, Display device or the like, specify "Use serial communication".
  • Page 396 FUNCTIONS (7) Error codes for communication made using serial communication function Table6.49 indicates the error codes, error definitions and corrective actions that are sent from the CPU module to the external device when errors occur during communication made using the serial communication function. Table6.49 List of error codes sent from CPU module to external device Error Code Error Item...
  • Page 397 FUNCTIONS Table6.49 List of error codes sent from CPU module to external device (Continued) Error Code Error Item Error Definition Corrective Action (Hexadecimal) • The command or device specified does not • Check and correct the sent message of the device 7F22 Command error exist.

  • Page 398: Reading The Module Service Interval Time

    FUNCTIONS 6.25 Reading the Module Service Interval Time The module service interval indicates the time between a transient request such as monitor, test, program read/write. The CPU module can monitor the service interval time (time from service acceptance to next service acceptance) of the intelligent function module, network module or GX Developer.
  • Page 399 FUNCTIONS (2) (Program example) The following program example reads the module service interval of the intelligent function module at X/Y160 (Diagram 6.89). Read start signal Sets I/O number 160 (hexadecimal) to SD550. Starts module service interval time read. Stores module service interval time into D551, D552. Diagram 6.89 Module service interval reading program example POINT 1.

  • Page 400: Device Initial Value

    FUNCTIONS 6.26 Device Initial ValueNote69 Basic Note6.68 (1) Definition The device initial value is a function that registers the data used in a program to the Note6.69 device or intelligent function module/special function module buffer memory Basic without any program.Note70 Note6.69 (2) Application of device initial value Process...
  • Page 401 FUNCTIONS (3) Timing when device initial values are written to specified devices The CPU module writes the data of the specified device initial value file to the specified device or intelligent function module buffer memory when the PLC is powered on or the CPU module is switched from the STOP status to the RUN status. Program memory Device initial Device...
  • Page 402 FUNCTIONS (5) Procedure and setting for use of device initial values In order to use the device initial values, the device initial data must be created with GX Developer in advance, and this data must be stored as a device initial value file in the Note6.70 CPU module program memory, standard RAM or memory card.
  • Page 403 FUNCTIONS • At the "PLC file" tab screen in the "(PLC) Parameter" dialog box, designate the name of the file where the device initial value data is to be stored. 1) For Basic model QCPU Set Device initial values to "Use" in the PLC file setting of the PLC parameter dialog box.
  • Page 404 FUNCTIONS (6) Precautions for the use of device initial values (a) When device initial value data and latch range data are overlapped In cases where both device initial value data and latch range data are overlapped, the device initial value data takes priority. Hence, the latch range data are also changed to the device initial value data when the power supply is switched OFF and then ON.

  • Page 405: Chapter7 Communication With Intelligent Function Module

    COMMUNICATION WITH INTELLIGENT FUNCTION MODULE CHAPTER7 COMMUNICATION WITH INTELLIGENT FUNCTION MODULE (1) Description of intelligent function modules The intelligent function module is a module that allows the CPU module to process analog values or high speed pulses which cannot be processed with I/O modules. For example, an analog value is converted into a digital value with the analog/digital conversion module, one of the intelligent function modules, before being used.

  • Page 406: Communication Between Cpu Module And Intelligent Function Modules

    COMMUNICATION WITH INTELLIGENT FUNCTION MODULE 7.1 Communication Between CPU Module and Intelligent Function Modules The following methods enable the communication between the CPU module and intelligent function modules: • Initial setting or automatic refresh setting using GX Configurator Section 7.1.1) •...

  • Page 407: Initial Setting And Auto Refresh Setting By Gx Configurator

    COMMUNICATION WITH INTELLIGENT FUNCTION MODULE 7.1.1 Initial setting and auto refresh setting by GX Configurator The initial setting and auto refresh setting of the intelligent function modules can be performed by adding in intelligent function module-compatible GX Configurator to GX Developer.
  • Page 408 COMMUNICATION WITH INTELLIGENT FUNCTION MODULE (b) Auto refresh setting For the auto refresh setting, designate the device at the CPU module to store the following data. • Digital output of Q64AD • Maximum/minimum values of Q64AD • Error code The auto refresh setting of Q64AD is designated on the following auto refresh setting screen of GX Configurator (Diagram 7.2).

  • Page 409: Initial Setting By Device Initial Value

    COMMUNICATION WITH INTELLIGENT FUNCTION MODULE 7.1.2 Initial setting by device initial value (1) Device initial value Using the device initial values, the initial setting of the intelligent function module can be made without a program. ( Section 6.26) The set device initial values are written from the CPU module to the intelligent function module when the PLC is powered OFF and then ON or the CPU module is reset or switched from STOP to RUN.

  • Page 410: Communication By Intelligent Function Module Device

    COMMUNICATION WITH INTELLIGENT FUNCTION MODULE 7.1.4 Communication by intelligent function module device (1) Intelligent function module device The intelligent function module device is the buffer memory of the intelligent function module represented as a device of the CPU module program. ( Section 9.5) The data stored in the intelligent function module buffer memory can be handled by the sequence instruction like the device memory.
  • Page 411 COMMUNICATION WITH INTELLIGENT FUNCTION MODULE POINT The intelligent function module device accesses the intelligent function module every time the instruction is executed. When reading/writing buffer memory data using multiple intelligent function module devices in a sequence program, make sure to read/write the data in one position of the program using the FROM/TO instruction.

  • Page 412: Communication By Instructions For Intelli. Function Modules

    COMMUNICATION WITH INTELLIGENT FUNCTION MODULE 7.1.5 Communication by instructions for Intelli. function modules (1) Description of the instructions dedicated for intelligent function modules The instructions dedicated for intelligent function modules are the instructions that facilitate programming using the functions of the intelligent function modules. (a) Example of serial communication module dedicated instruction (OUTPUT instruction) Use of the OUTPUT instruction allows communication with the external device by...
  • Page 413 COMMUNICATION WITH INTELLIGENT FUNCTION MODULE (3) Precautions (a) When RUN is switched to STOP before completion device turns ON If the instruction dedicated for intelligent function modules are executed and the CPU module is switched from RUN to STOP before the completion device turns ON, the completion device turns ON one scan later when the CPU module is switched to RUN next time.

  • Page 414: Access To Ans Series Corresponding Special Function Module

    COMMUNICATION WITH INTELLIGENT FUNCTION MODULE 7.2 Access to AnS Series Corresponding Special Function Module Basic Note7.1 (1) Effects of quicker access to the special function moduleNote72 Process The Q series CPU module can process at higher speed, taking shorter time to scan. When the FROM/TO instruction is frequently executed for the special function module Note7.1 during a short scan, the processing of the target special function module may not be...

  • Page 415: Chapter8 Parameters

    PARAMETERS CHAPTER8 PARAMETERS This chapter explains the parameters that are set when a PLC system is configured. (1) Parameter types There are the following CPU module parameters. • PLC parameter ( Section 8.1) Set when the PLC is used independently. •...

  • Page 416: Plc Parameters

    PARAMETERS 8.1 PLC Parameters This section explains the PLC parameter list and parameter details. 8.1.1 Basic model QCPU (1) PLC name Set the label and comment of the used CPU module. Setting the label and comment in the PLC name does not affect the actual operation. Diagram 8.1 PLC name Table8.1 PLC name list Item...
  • Page 417 No setting Section 9.10 pointer setting) No. of the intelligent function I50 to 127 module. [ Q00JCPU ] 0 points/16 points/32 points/64 points/128 points/256 points Set the number of empty slots on Points occupied by 1007 the main base unit/extension 16 points Section 4.6.1(5)
  • Page 418 PARAMETERS Table8.2 PLC system setting list (Continued) Item Parameter No. Description Setting range Default value Reference Interrupt C0 to 13184 (Can be set up to Set the start No. of the interrupt counter the number of counter setting No setting Section 9.2.11(4) counters.
  • Page 419 PARAMETERS (4) PLC RAS Make the various settings for the RAS function. Diagram 8.4 PLC RAS Table8.4 PLC RAS list Item Parameter No. Description Setting range Default value Reference (watchdog Set the watchdog timer value of 3000 10ms to 2000ms (10ms unit) 200ms Section 3.2 timer)

  • Page 420: Latch Clear Operation

    PARAMETERS (5) Device Set the number of used points and latch range for each device. Diagram 8.5 Device Table8.5 Device list Item Parameter No. Description Setting range Default value Reference : 2k points : 2k points X (2k points), Y (2k points), S (2k : 8k points points), SB (1k points) and SW : 2k points...
  • Page 421 PARAMETERS (6) Boot file Set whether a boot from the standard ROM will be executed or not. Diagram 8.6 Boot file Table8.6 Boot file list Item Parameter No. Description Setting range Default value Reference Set whether a boot from the Do not execute boot/Execute Boot file 7000...
  • Page 422 PARAMETERS (7) SFC Set the SFC program start mode, start condition and block stop-time output mode when an SFC program is used. Diagram 8.7 SFC Table8.7 SFC list Item Parameter No. Description Setting range Default value Reference SFC program start mode 8002 Initial start Set the SFC program start...
  • Page 423 Set the model name of the Model mounted module. (User memo. 16 characters No setting name Not used for the CPU module.) [ Q00JCPU ] 0 points, 16 points, 32 points, 0400 Section 4.7 assignment 48 points, 64 points, 128 points, 256 points...
  • Page 424 PARAMETERS Table8.8 I/O assignment list (Continued) Item Parameter No. Description Setting range Default value Reference Set the model name of the used Base main base unit or extension base model 16 characters No setting unit. (User memo. Not used for name the CPU module.) Set the model name of the...
  • Page 425 PARAMETERS (9) Serial communication Set the transmission speed, sum check, message waiting time and online program change enabled/disabled when the serial communication function of the Q00CPU or Q01CPU is used. Diagram 8.9 Serial communication Table8.9 Serial communication list Item Parameter No. Description Setting range Default value...
  • Page 426 PARAMETERS (10) X/Y assignment Check the data set in the I/O assignment, MELSECNET/Ethernet setting and CC-Link setting. Diagram 8.10 X/Y assignment Table8.10 X/Y assignment list Item Parameter No. Description Setting range Default value Reference The data set in the I/O assignment, MELSECNET/ X/Y assignment ----...
  • Page 427 PARAMETERS (11)Multiple CPU setting Make the settings to configure a multiple CPU system. Diagram 8.11 Multiple CPU setting Table8.11 Multiple CPU setting list Item Parameter No. Description Setting range Default value Reference Set the number of CPU modules Number of PLC 0E00 used by the multiple CPU 1 to 3 modules...

  • Page 428: High Performance Model Qcpu, Process Cpu, Redundant Cpu

    PARAMETERS 8.1.2 High Performance model QCPU, Process CPU, Redundant CPU (1) PLC name Set the label and comment of the used CPU module. Setting the label and comment in the PLC name does not influence the actual operation. Diagram 8.12 PLC name Table8.12 PLC name list Item Parameter No.
  • Page 429 PARAMETERS (2) PLC system Make setting necessary to use the CPU module. The parameters may be the default values to perform control. Diagram 8.13 PLC system Table8.13 PLC system list Item Parameter No. Description Setting range Default value Reference Low speed 1ms to 1000ms (1ms unit) 100ms Section 9.2.10...
  • Page 430 PARAMETERS Table8.13 PLC system list (Continued) Item Parameter No. Description Setting range Default value Reference Set the number of empty slots on 0 points/16 points/32 points/64 Points occupied by 1007 the main base unit/extension points/128 points/256 points/512 16 points Section 4.6.1(5) empty slot base unit.
  • Page 431 PARAMETERS (3) PLC file Set various files used by the CPU module. Diagram 8.14 PLC file Table8.14 PLC file list Item Parameter No. Description Setting range Default value Reference • Do not use Set the file register file used by •...
  • Page 432 PARAMETERS (4) PLC RAS (PLC RAS (1) Set various items for the RAS function. Diagram 8.15 PLC RAS Table8.15 PLC RAS list Item Parameter No. Description Setting range Default value Reference Set the watchdog timer value of 10ms to 2000ms (10ms unit) 200ms Section 3.2 setting...
  • Page 433 PARAMETERS Table8.15 PLC RAS list (Continued) Item Parameter No. Description Setting range Default value Reference Computation error Expanded command error Fuse blown I/O module compari- son error Intelligent module Operating program mode when Set the operation mode of the 3002 Stop/Continue Stop Section 6.17...
  • Page 434 PARAMETERS (5) PLC RAS (2) Make the various settings for the RAS function in the Redundant CPU. This setting can be made only when the Redundant CPU is used. Diagram 8.16 PLC RAS (2) Table8.16 PLC RAS (2) list Item Parameter No.
  • Page 435 PARAMETERS (6) Device Set the number of used points, latch range and local device range for each device. Diagram 8.17 Device Table8.17 Device list Item Parameter No. Description Setting range Default value Reference :8k points :8k points M :8k points X (8k points), Y (8k points), S (8k :8k points points), SB (2k points) and SW...
  • Page 436 PARAMETERS (7) Program When writing multiple programs to the CPU module, set the file names and execution types (execution conditions) of the programs. Diagram 8.18 Program Table8.18 Program list Item Parameter No. Description Setting range Default value Reference When writing multiple programs to the CPU module, set the file •...
  • Page 437 PARAMETERS (8) Boot file Make the settings to execute boot run and automatic write to standard ROM. Diagram 8.19 Boot file Table8.19 Boot file setting list Item Parameter No. Description Setting range Default value Reference Clear Set whether the program Do not clear Do not clear/Clear program program...
  • Page 438 PARAMETERS (9) SFC Set the SFC program start mode, start condition and block stop-time output mode when an SFC program is used. Diagram 8.20 SFC Table8.20 SFC list Item Parameter No. Description Setting range Default value Reference SFC program start mode 8002 Initial start Set the SFC program start...
  • Page 439 PARAMETERS (10)I/O assignment Set the mounting status of each module in the system. Diagram 8.21 I/O assignment Table8.21 I/O assignment list Item Parameter No. Description Setting range Default value Reference • CPU No. 2 to No. 4: No. n/ empty (Set "CPU (Empty)" on the slot not mounted with the Set the type of the mounted Type...
  • Page 440 PARAMETERS Table8.21 I/O assignment list (Continued) Item Parameter No. Description Setting range Default value Reference Set the model name of the used Base main base unit or extension base model 16 characters No setting unit. (User memo. Not used for name the CPU module.) Set the model name of the...
  • Page 441 PARAMETERS (11) X/Y assignment Check the data set in the I/O assignment, MELSECNET/Ethernet setting and CC-Link setting. Diagram 8.22 X/Y assignment Table8.22 X/Y assignment list Item Parameter No. Description Setting range Default value Reference The data set in the I/O assignment, MELSECNET/ X/Y assignment ----...
  • Page 442 PARAMETERS Redundant Note8.1 (12) Multiple CPU setting Note1 Note8.1 Make setting to configure a multiple CPU system. Diagram 8.23 Multiple CPU setting Table8.23 Multiple CPU setting list Item Parameter No. Description Setting range Default value Reference Set the number of CPU modules Number of PLC 0E00 used by the multiple CPU...
  • Page 443 PARAMETERS Table8.23 Multiple CPU setting list (Continued) Item Parameter No. Description Setting range Default value Reference Set whether the input status of All CPUs the input module or intelligent Do not import non-group input Do not import non- can read all function module controlled by status/Import non-group input group input status...

  • Page 444: Redundant Parameter

    PARAMETERS 8.2 Redundant Parameter Basic Note8.2 This section explains the redundant parameter list and parameter details.Note2 High Performance Table8.24 Redundant parameters Parameter Note8.2 Item Description Setting range Default value Reference Process Set the operation mode Redundant 0D00 and tracking in the ---- ---- ----...
  • Page 445 PARAMETERS (2) Tracking settings Make the settings for the tracking function of the Redundant CPU. Diagram 8.25 Tracking settings Table8.26 Tracking settings list Item Parameter No. Description Setting range Default value Reference Set whether the range of the Internal device block setting/ Internal device Tracking device settings tracking device data will be set...

  • Page 446: Network Parameters

    PARAMETERS 8.3 Network Parameters This section explains the network parameter list and parameter details. mn, M and N in the Parameter No. field of this section mn, M and N in the Parameter No. field of this section indicate the following. : Indicates a "start I/O No.
  • Page 447 PARAMETERS (1) MELSECNET/H setting Set the MELSECNET/H network parameters. Diagram 8.26 Network parameters Setting the number of MNET/10H Ethernet cards. (for MELSECNET/H setting) Table8.29 MELSECNET/H setting list Item Parameter No. Description Setting range Default value Reference Nunber of MELSECNET 5000 Starting I/O No.
  • Page 448 PARAMETERS (2) Ethernet setting Set the Ethernet network parameters. Diagram 8.27 Network parameters Setting the number of MNET/10H Ethernet cards. (for Ethernet setting) Table8.30 Ethernet setting list Item Parameter No. Description Setting range Default value Reference Nunber of Ethernet 9000 Starting I/O No.
  • Page 449 PARAMETERS (3) CC-Link setting Set the CC-Link parameters. Diagram 8.28 Network parameters Setting the CC-Link list Table8.31 Network parameters Setting the CC-Link list Item Parameter No. Description Setting range Default value Reference Number of CC-Link C000 Starting I/O No. Operational settings All connect count Remote input (RX) Remote output (RY)
  • Page 450 PARAMETERS Table8.31 Network parameters Setting the CC-Link list (Continued) Item Parameter No. Description Setting range Default value Reference Special relay (SB) CNM1 Set the CC-Link parameters. Refer to the CC-Link Manual. ---- ---- Special register (SW) Retry count Automatic reconnection station count Standby master station PLC down select...

  • Page 451: Remote Password

    PARAMETERS 8.4 Remote Password This section explains the remote password-related parameter list and parameter details. Diagram 8.29 Remote password setting screens Set the remote password of the Ethernet module, serial communication module and modem interface module. Table8.32 Remote password setting list Item Parameter No.

  • Page 452: Chapter9 Device Explanation

    DEVICE EXPLANATION CHAPTER9 DEVICE EXPLANATION This chapter describes all devices that can be used in the CPU module. 9.1 Device List The names and data ranges of devices which can be used in the CPU module are shown in Table9.1. (1) Basic model QCPU Table9.1 Device List Default Values...
  • Page 453 Table9.1 Device List(Continued) Default Values Parameter Number of Reference Class Type Device Name Designated Points Range Used Section Setting Range Q00JCPU 0 points Word File File register Unchangeable Section 9.7 Q00CPU, R0 to 32767 device register 64k points Q01CPU ZR0 to 65535...
  • Page 454 DEVICE EXPLANATION (2) High Performance model QCPU, Process CPU, Redundant CPU Table9.2 Device List Default Values Parameter Reference Number of Class Type Device Name Designated Range Used Section Setting Range Points 8192 points X0 to 1FFF Section 9.2.1 Input 8192 points Y0 to 1FFF Section 9.2.2 Output...
  • Page 455 DEVICE EXPLANATION Table9.2 Device List(Continued) Default Values Parameter Reference Number of Class Type Device Name Designated Range Used Section Setting Range Points SFC block device 320 points BL0 to 319 Section 9.11.1 devices SFC transition device 512 points TR0 to 511 Section 9.11.2 Network No.

  • Page 456: Internal User Devices

    DEVICE EXPLANATION 9.2 Internal User Devices (1) Definition Internal user devices can be used for various user applications. The "number of usable points" setting is designated in advance (default value) for internal user devices. However, this setting can be changed at the "Device" tab screen in the "(PLC) Parameter"...

  • Page 457: High Performance Model Qcpu, Process Cpu And Redundant Cpu

    DEVICE EXPLANATION POINT For the High Performance model QCPU, Process CPU and Redundant CPU, the total number of internal relay, latch relay, annunciator, edge relay, link relay, link special relay, step relay, timer, retentive timer and counter points is a maximum of 64k points.
  • Page 458 DEVICE EXPLANATION (4) Device point assignment example A device point assignment example for the High Performance model QCPU is shown in Table9.4. Table9.4 is based on the device point assignment sheet shown in Appendix 5. Table9.4 Device point assignment example (for High Performance model QCPU) *1*2 Restriction check Device...

  • Page 459: Input (X)

    DEVICE EXPLANATION 9.2.1 Input (X) (1) Definition Inputs transmit commands or data to the High Performance model QCPU from an external device such as push-button switches, selector switches, limit switches, digital switches. Push-button switch Selector switch Input (X) Sequence operation Digital switch Diagram 9.2 Commands from external devices to CPU module (2) Concept of input (X)
  • Page 460 DEVICE EXPLANATION POINT 1. When debugging a program, an input (X) can be set to ON/OFF as described below. • GX Developer test operation • OUT Xn instruction OUTX1 ON/OFF command Diagram 9.5 Input(X) ON/OFF by the OUT Xn instruction 2.

  • Page 461: Output (Y)

    DEVICE EXPLANATION 9.2.2 Output (Y) (1) Definition Outputs give out the program control results to the external devices such as solenoid, electromagnetic switch, signal lamp and digital display. Outputs give out the result equivalent to one N/O contact. Signal lamp Digital display Output (Y) Sequence...

  • Page 462: Internal Relay (M)

    DEVICE EXPLANATION 9.2.3 Internal relay (M) (1) Definition Internal relays are auxiliary relays used in the CPU module. All internal relays are switched OFF at the following times: • When the PLC is powered OFF and then ON • When the CPU module is reset •...

  • Page 463: Latch Relay (L)

    DEVICE EXPLANATION 9.2.4 Latch relay (L) (1) Definition Latch relays are auxiliary relays which can be latched by the programmable controller's internal latch (memory backup). Latch relay operation results (ON/OFF information) are saved even in the following cases: • When the PLC is powered OFF and then ON •...
  • Page 464 DEVICE EXPLANATION (4) Procedure for external outputs Outputs (Y) are used to output sequence program operation results to an external destination. POINT 1. Internal relays (M) should be used when a latch (memory backup) is not required.( Section 9.2.3) 2. For latch clear, the latch clear disabled range can be set to each device in the device setting of the PLC parameter dialog box.( Section 6.3) 9.2 Internal User Devices...

  • Page 465: Annunciator (F)

    DEVICE EXPLANATION 9.2.5 Annunciator (F) (1) Definition Annunciators are internal relays used for fault detection programs created by the user. (2) Special relay and special registers at annunciator ON When annunciators switch ON, a special relay (SM62) switches ON, and the Nos. and quantity of the annunciators which switched ON are stored at the special registers (SD62 to 79).
  • Page 466 DEVICE EXPLANATION (5) Annunciator ON procedure (a) Annunciator ON procedure The annunciator can be turned ON by either of the following instructions. 1) SET F instruction The SET F instruction turns ON the annunciator only on the leading edge (OFF R ON) of the input condition. If the input condition turns OFF, the annunciator is held ON.
  • Page 467 DEVICE EXPLANATION (b) Processing at annunciator ON 1) Data stored at special registers (SD62 to 79) • Nos. of annunciators which switched ON are stored in order at SD64 to • The annunciator No. which was stored at SD64 is stored at SD62. •...
  • Page 468 DEVICE EXPLANATION (6) Annunciator OFF procedure and processing content (a) Annunciator OFF procedure The annunciator can be turned OFF by any of the following instructions. 1) RST F instruction An annunciator No. which has been switched ON by the SET F instruction can be switched OFF by the RST F instruction.
  • Page 469 DEVICE EXPLANATION (b) Processing at annunciator OFF 1) Special register (SD62 to 79) data operation at execution of LEDR Note9.5 instruction Note5 • The annunciator No. stored in SD64 is deleted, and the annunciator Nos. Basic stored in SD65 and later are shifted up. Note9.5 •...
  • Page 470 DEVICE EXPLANATION 2) Special register (SD62 to 79) data operation when annunciator is tunred OFF by executing the RST F instruction or BKRST instruction • The annunciator No. specified by the RST instruction/BKRST instruction is deleted, and the stored annunciator Nos. after the deleted annunciator No.

  • Page 471: Edge Relay (V)

    DEVICE EXPLANATION 9.2.6 Edge relay (V) (1) Definition An edge relay is a device which stores the operation results (ON/OFF information) from the beginning of the ladder block. Edge relays can only be used at contacts, and cannot be used as coils. Edge relay Stores the X0, X1 and X10 operation results...

  • Page 472: Link Relay (B)

    DEVICE EXPLANATION 9.2.7 Link relay (B) (1) Definition Link relays are CPU module side relays used when refreshing the link relay (LB) data of the MELECNET/H network module, etc. to the CPU module or when refreshing the CPU module data to the link relays (LB) of the MELECNET/H network module, etc. CPU module MELSECNET/H network module Link relay...
  • Page 473 DEVICE EXPLANATION (3) Using link relays in the network system In order to use link relays in the network system, a network parameter setting is required. The link relay range where network parameter setting has not been made (not used by the MELSECNET/H network system, etc.) is available as the internal relays or latch relays.

  • Page 474: Link Special Relay (Sb)

    DEVICE EXPLANATION 9.2.8 Link special relay (SB) (1) Definition A link special relay indicates the communication status and error detection of an intelligent function module, such as the MELSECNET/H Network Module. ON/OFF of the link special relays are controlled by various causes that occur during data link.

  • Page 475: Step Relay (S)

    DEVICE EXPLANATION 9.2.9 Step relay (S) Step relays are devices for SFC programs. Refer to the following manual for how to use the step relays. QCPU (Q Mode)/QnACPU Programming Manual (SFC) POINT Because the step relay is a device exclusively for the SFC program, it cannot be used as an internal relay in the sequence program.

  • Page 476: Timer (T)

    DEVICE EXPLANATION 9.2.10 Timer (T) (1) Definition A timer (T) is a device that starts counting when its coil turns ON, and times-out and turns ON its contact when the current value reaches or exceeds the set value. The timer is of an up-counting type. The current value matches the set value when a "time-out"...
  • Page 477 DEVICE EXPLANATION (b) Measurement units The default time measurement units setting for low speed timers is 100 ms. The time measurement units setting can be designated in 1 ms units within a 1 ms to 1000 ms range. This setting is designated at the "PLC system" tab screen in the "(PLC) Parameter"...
  • Page 478 DEVICE EXPLANATION (6) Retentive timers (a) Definition Retentive timers measure the "coil ON" time. The measurement begins when the timer coil switches ON, and the contact switches ON when a time-out (coil OFF) occurs. Even when the timer coil is OFF, the current value and the contact ON/OFF status are saved.
  • Page 479 DEVICE EXPLANATION (7) Timer Processing and accuracy (a) Processing method When an OUT T instruction is executed, the following is processed: timer coil ON/OFF, current value update and contact ON/OFF processing. Timer current value update and contact ON/OFF processing are not performed at END processing.
  • Page 480 DEVICE EXPLANATION (b) Accuracy When the OUT T instruction is executed, the current value is added to the scan time measured at the END instruction. If the timer coil is OFF when the OUT T instruction is executed, the current value is not updated.
  • Page 481 DEVICE EXPLANATION (8) Precautions for using timers The following are a few precautions regarding timer use: (a) Use of the same timer A given timer cannot be designated (by OUT T ) more than once in a single scan. This designation results in measurement, since the timer current value is updated at execution of each OUT T instruction.
  • Page 482 DEVICE EXPLANATION (g) When two timers are used If two timers are used, the ON/OFF ladders should be created as shown in Diagram 9.27. 1 second measurement following T0 ON 1 second measurement when T1 OFF ON/OFF repeated every 1 second Diagram 9.27 ON/OFF ladder using two timers 9.2 Internal User Devices - 31...

  • Page 483: Counter (C)

    DEVICE EXPLANATION 9.2.11 Counter (C) (1) Definition A counter is a device which counts the number of input condition leading edges in sequence programs. When the count value matches the set value, the counter counts up and its contact turns ON. The counter is of an up-counting type.
  • Page 484 DEVICE EXPLANATION (b) Current value update (count value + 1) The current value update (count value + 1) is performed at the leading edge (OFF to ON) of the OUT C instruction. The current value is not updated in the following OUT C instruction statuses: OFF, ON to ON, ON to OFF [Ladder example]...
  • Page 485 DEVICE EXPLANATION (c) Resetting the counter Counter current values are not cleared even if the OUT C instruction switches OFF. Use the RST C instruction to clear the counter's current value and switch the contact OFF. The count value is cleared and the contact is switched OFF at execution of when the RST C instruction.
  • Page 486 DEVICE EXPLANATION OUT C0 RST C0 OUT C0 RST C0 Sequence program Coil of C0 Current value is updated Current value update since coil of C0 turns & contact ON Coil of C0 OFF from OFF to ON. RST C0 Count value cleared &...
  • Page 487 DEVICE EXPLANATION (4) Interrupt counters (a) Definition Interrupt counters are devices which count the number of interrupt factor occurrences. (b) Count processing 1) When interrupt occurs The interrupt counter's current value is updated when an interruption occurs. It is not necessary to create a program which includes an interrupt counter function.
  • Page 488 DEVICE EXPLANATION (5) Precautions (a) Execution of interrupt counter and interrupt program One interrupt pointer is insufficient to execute interrupt counter and interrupt program operation. Moreover, an interrupt program cannot be executed by an interrupt counter setting designated at the "PLC system" tab screen in the "(PLC) Parameter" dialog box. (b) Processing that delays count processing If the processing items shown below are in progress when an interruption occurs, the counting operation will be delayed until processing of these items is...

  • Page 489: Data Register (D)

    DEVICE EXPLANATION 9.2.12 Data register (D) (1) Definition Data registers are memory devices which store numeric data (-32768 to 32767, or 0000 to FFFF (2) Bit configuration of data register (a) Bit configuration and read and write units Data registers, which consist of 16 bits per point, read and write data in 16-bit units.

  • Page 490: Link Register (W)

    DEVICE EXPLANATION 9.2.13 Link register (W) (1) Definition A link register is the CPU module memory used to refresh the CPU module with data from the link registers (LW) of intelligent function modules including MELSECNET/H network module. CPU module MELSECNET/H network module Link register Link register Link refresh...
  • Page 491 DEVICE EXPLANATION (b) When link register is used for 32-bit instruction If the link registers are used for 32-bit instructions, the data is stored in registers Wn and Wn + 1. The lower 16 bits of data are stored in the link register No. (Wn) designated in the sequence program, and the higher 16 bits of data are stored in the designated register No.

  • Page 492: Link Special Register (Sw)

    DEVICE EXPLANATION (4) Using link registers in a network system In order to use link registers in the network system, network parameter settings must be made. Link registers not set in the network parameter settings can be used as data registers. Remark Refer to the following manual for the network parameters.

  • Page 493: Internal System Devices

    DEVICE EXPLANATION 9.3 Internal System Devices Internal system devices are used for system operations. The allocations and sizes of internal system devices are fixed, and cannot be changed by the user. 9.3.1 Function devices (FX, FY, FD) (1) Definition Function devices are used in subroutine programs with arguments. The function devices write/read data between a subroutine call source with argument and a subroutine program with argument.
  • Page 494 DEVICE EXPLANATION (c) Function registers (FD) • Function registers are used to perform write/read of data between the sub- routine call source and the subroutine program. • The function register I/O condition is automatically determined by the High Performance model QCPU. If the subroutine program data is the source data, the data is designated as subroutine input data.
  • Page 495 DEVICE EXPLANATION POINT Valid devices cannot be used in a subroutine program that contains arguments. If devices assigned for function registers are used, values of the function registers will not correctly be returned to a calling program. CALLP P0 D0 D R0 R10 FD0 MOV K0 D3 Since the points (D0 to 3) are used...

  • Page 496: Special Relay (Sm)

    DEVICE EXPLANATION 9.3.2 Special relay (SM) (1) Definition A special relay is used to store CPU module status data. (2) Special relay classifications Special relays are classified according to their applications, as shown in Table9.8. Table9.8 Special relay classification list CPU module High Classification...

  • Page 497: Special Register (Sd)

    DEVICE EXPLANATION 9.3.3 Special register (SD) (1) Definition A special register is used to store CPU module status data (diagnosis and system information). (2) Special register classifications Special registers are classified according to their applications, as shown in Table9.9. Table9.9 Special register classification list CPU module High Classification...
  • Page 498 DEVICE EXPLANATION Remark For details on special relays refer to Appendix 2. 9.3 Internal System Devices - 47 9.3.3 Special register (SD)

  • Page 499: Link Direct Device

    DEVICE EXPLANATION 9.4 Link direct device (1) Definition MELSECNET/H network modules. Link direct devices are used to directly access the link devices in the MELSECNET/H network modules. At END processing of sequence program, a data refresh (data transfer) is performed between the High Performance model QCPU.
  • Page 500 DEVICE EXPLANATION (3) Designation range Link direct device designations are allowed for all the link devices in network modules. Device outside the range specified by the network refresh parameters can also be designated. (a) Writing • Writing is executed within that part of the link device range set as the send range in the common parameters of the network parameters that is outside the range specified as the "refresh range"...
  • Page 501 DEVICE EXPLANATION • Although writing is also allowed in the "refresh range" portion of the link device range (specified by refresh parameters), the link module's link device data will be rewritten when a refresh operation occurs. When writing by link direct device, the same data should also be written to the CPU module related devices designated by refresh parameter.
  • Page 502 DEVICE EXPLANATION (b) Reading Reading by link direct device is allowed in the entire link device range of network modules. POINT By using link direct device, the CPU reads from/writes to a single network module with one network number assigned. When one network number has been assigned to two or more network modules on the same base unit, the CPU module reads from/writes to the network module Note9.10...
  • Page 503 DEVICE EXPLANATION (4) Differences between "link direct devices" and "link refresh" The differences between "link direct devices" and "link refresh" are shown in Table9.10. Table9.10 Differences Between "Link Direct Devices" and "Link Refresh" Item Link Direct Device Link Refresh Link relay B0 or later J \K4B0 or later Program...

  • Page 504: Intelligent Function Module Device

    Starting I/O number of intelligent function module/special function module Setting : First 2 digits of starting I/O number expressed in 3 digits X/Y1F0 For X/Y1F0 Designation: 1F Setting range : Q00JCPU : 00 to 0F Q00/Q01CPU : 00 to 3F Other CPU module : 00 to FE Diagram 9.52 Intelligent function module device designation method...
  • Page 505 DEVICE EXPLANATION (3) Processing speed The processing speed for intelligent function module devices is; • The processing speed of read/write by the intelligent function module device is slightly higher than that of read/write by the FROM/TO instruction. (For example, "MOV U2\G11 D0") •...

  • Page 506: Index Register (Z)

    DEVICE EXPLANATION 9.6 Index Register (Z) (1) Definition Index registers are used in the sequence program for indirect setting (index qualification) designations. An index register point is used for index modification. MOVP SM400 D0Z0 K4Y30 Index registers consist of 16 bits per point.
  • Page 507 DEVICE EXPLANATION (b) When index register is used for 32-bit instruction If the index registers are used for 32-bit instructions, the data is stored in registers Zn and Zn +1. The lower 16 bits of data are stored in the index register No. (Zn) designated in the sequence program, and the upper 16 bits of data are stored in the designated index register No.
  • Page 508 DEVICE EXPLANATION 9.6.1 Switching between scan execution and low speed execution types Basic Note13 Note9.12 Redundant The CPU module saves (protects) and restores the index register (Z0 to 15) contents when switching between a scan execution type program and a low speed execution type Note9.12 program.

  • Page 509: Switching Scan/Low Speed Exec. To Interrupt/Fixed Scan Exec

    DEVICE EXPLANATION 9.6.2 Switching scan/low speed exec. to Interrupt/fixed scan exec. Basic Note9.13 The CPU module performs the following processing when switching between a scan/ low speed execution type program and an interrupt/fixed scan execution type Redundant program. • Index register value is saved (protected)/restored. Note9.14 •...
  • Page 510 DEVICE EXPLANATION (2) Index register processing (a) When "High-speed execution" is not selected 1) When switching from scan/low speed execution type program to interrupt/fixed scan execution type program The CPU module saves the index register value of the scan/low speed execution type program and passes it to the interrupt/fixed scan execution type program.
  • Page 511 DEVICE EXPLANATION (b) When "High-speed execution" is selected 1) When switching from scan/low speed execution type program to interrupt/fixed scan execution type program The CPU module does not save/restore the index register value. 2) When switching from interrupt/fixed scan execution type program to scan/low speed execution type program If data is written to index registers by using an interrupt program/fixed scan execution type program, the values of index registers used for an scan/low...
  • Page 512 DEVICE EXPLANATION (3) Processing of file register block No. (a) When switching from scan/low speed execution type program to interrupt/ fixed scan execution type program The CPU module saves the file register block No. of the scan/low speed execution type program and passes it to the interrupt/fixed scan execution type program. (b) When switching from interrupt/fixed scan execution type program to scan/ low speed execution type program The CPU module restores the saved file register block No.

  • Page 513: File Register (R)

    DEVICE EXPLANATION 9.7 File Register (R) (1) Definition File registers are expansion devices for data registers. The file registers can be used at the same processing speed as the data registers. K100 R2 File register "100" is written to R2. Diagram 9.65 Write to file register (2) Bit configuration of file register (a) Bit configuration and read and write units...

  • Page 514: File Register Data Storage Location

    The file register data storage location changes depending on the CPU module. The file register data storage location of each CPU module is as described in Table9.11. Table9.11 File register data storage locations CPU module Storage location Q00JCPU None (File registers unavailable) Basic model QCPU Q00CPU, Q01CPU Standard RAM...

  • Page 515: File Register Capacity

    (1) Using the Standard RAM The standard RAM can store the following points of file registers. Table9.12 File register capacity of each CPU module *1*2 CPU module Number of points Q00JCPU File registers unavailable Basic model QCPU Q00CPU, Q01CPU 64k points Q02CPU...

  • Page 516: Differences In Access Methods By Storage Destination Memory

    DEVICE EXPLANATION 9.7.3 Differences in access methods by storage destination memory The file register access method changes depending on the memory.Note15 Basic Table9.13 File register access method for each memory Note9.15 SRAM Card Flash Card How to Access Standard RAM Note9.15 Note9.15 Read with a user's program...

  • Page 517: File Register Registration Procedure

    DEVICE EXPLANATION 9.7.4 File register registration procedureNote16 Basic Note9.16 To use file registers, register the file registers with the CPU module in the following steps. Start Setting of file register to be used "PLC file" tab screen at(PLC) "parameter" dialog box "Use the following files"...
  • Page 518 DEVICE EXPLANATION (1) Designating file registers for use The standard RAM or the memory card file registers which are to be used in the sequence program are determined at the "PLC file" tab screen in the "(PLC) Parameter" dialog box. Diagram 9.70 File register setting (a) Not used This setting should be selected for the following cases:...
  • Page 519 DEVICE EXPLANATION (b) Use the same file name as the program This setting should be selected when the file registers having the same file name as the sequence program are to be used. 1) Operation performed when program is changed If the program is changed, the file registers are automatically changed to conform to the new program name.
  • Page 520 DEVICE EXPLANATION (c) Use the following file This setting should be selected when a given file register is to be shared by all executed programs. Specify the desired parameters in the "Corresponding memory", "File name", and "Capacity" text boxes. The High Performance model QCPU creates a file register file with the specified parameters.
  • Page 521 DEVICE EXPLANATION (3) Registering the File Register File with the CPU module If you click on the following check boxes at the "PLC file" tab screen in the "(PLC) Parameter" dialog box, you must register a file register file with the CPU module: •...

  • Page 522: File Register Designation Method

    DEVICE EXPLANATION 9.7.5 File register designation method (1) Block switching format The block switching format designates the number of file register points in 32k point (R0 to 32767) units. If multiple blocks are used, switch to the block No. to be used in the RSET instruction for further file register settings.

  • Page 523: Precautions For Using File Registers

    DEVICE EXPLANATION 9.7.6 Precautions for using file registers (1) When Basic model QCPU is used An error will not occur if data are written/read to/from the file register numbers of 64k points or more. However, note that undefined data will be stored if data are read from the file registers.
  • Page 524 DEVICE EXPLANATION 2) Checking timing • A file register capacity check should be executed at step 0 of programs in which file registers are used. • After switching to another file register file using the QDRSET instruction, execute a file register capacity check. •...
  • Page 525 DEVICE EXPLANATION 3) Checking the file register capacity • Check The file register capacity used for each sequence program. • Determine if the file register capacity exceeds the number of points used, on the basis of the total file register capacity set in SD647 in the sequence program.
  • Page 526 DEVICE EXPLANATION (d) Change of file register processing time depending on CPU module Basic Process Redundant Note9.17 version Note17 When the file register is specified in the serial access format (ZR ) for the Note9.17 Note9.17 Note9.17 access instruction to the standard RAM on the High Performance model QCPU of which first 5 digits of serial No.

  • Page 527: Nesting (N)

    DEVICE EXPLANATION 9.8 Nesting (N) (1) Definition Nesting is a device used in the master control instruction (MC instruction, MCR instruction) to program operation conditions in a nesting structure. (2) Specifying method in master control instruction The master control instruction opens/closes a common ladder bus to create a sequence program of efficient ladder switching.

  • Page 528: Pointer (P)

    DEVICE EXPLANATION 9.9 Pointer (P) (1) Definition Pointer devices are used in jump instructions (CJ, SCJ, JUMP) or subroutine call instructions (CALL). (2) Pointer applications The pointers can be used in the following applications. • Pointers are used in jump instructions (CJ, SCJ, JMP) to designate jump destinations and labels (jump destination beginning).
  • Page 529 DEVICE EXPLANATION (4) Number of available pointer points The number of available pointer points changes depending on the CPU module. Table9.15 Number of available pointer points of each CPU module CPU module Number of points Basic model QCPU 300 points High Performance model QCPU Process CPU 4096 points...
  • Page 530 DEVICE EXPLANATION 9.9.1 Local pointerNote18 Basic Note9.18 (1) Definition Local pointers are pointers which can be used independently in program jump instructions and subroutine call instructions. The same pointer No. can be used in each of the programs. Program A Program B Same pointer is used.
  • Page 531 DEVICE EXPLANATION (3) Precautions for using local pointers (a) Program where local pointers are described Local pointers cannot be used from other program jump instructions and sub- routine CALL instructions. Use an ECALL instruction to call a subroutine subprogram in a program file that contains local pointers.

  • Page 532: Common Pointer

    DEVICE EXPLANATION 9.9.2 Common pointer Note19 Basic Note9.19 (1) Definition Common pointers are used to call subroutine programs from all programs being executed in the High Performance model QCPU. Program A Program C CALL P204 CALL P0 P204 FEND P205 Program B CALL P205 FEND...
  • Page 533 DEVICE EXPLANATION (2) Common pointer range of use In order to use common pointers, the first common pointer No. must be designated at the "PLC system" tab screen in the "(PLC) Parameter" dialog box. A range of common pointers starts from a specified pointer number to P4095. However, only pointer numbers subsequent to the local pointer range can be designated by parameter setting as common pointers.
  • Page 534 DEVICE EXPLANATION (3) Precautions for using common pointers (a) When the same pointer No. is used as label The same pointer No. cannot be used again as a label. Such use will result in a pointer configuration error (error code:4021). (b) When the total number of local pointer points exceeds the first number of common pointer If the last number of local pointers used in several programs overlaps the first...

  • Page 535: Interrupt Pointer (I)

    DEVICE EXPLANATION 9.10 Interrupt pointer (I) (1) Definition Interrupt pointers are used as labels at the beginning of interrupt programs. The interrupt pointers can be used in all running programs. Interrupt pointer (interrupt program label) Interrupt program IRET Diagram 9.84 Interrupt pointer (2) Number of available interrupt pointer points Table9.16 indicates the number of available interrupt pointer points.
  • Page 536 DEVICE EXPLANATION (3) Interrupt factors Table9.17 indicates the interrupt factors of the interrupt pointers. High Performance Note20 Note9.20 Table9.17 Interrupt factor classification Applicable CPU module Interrupt factor Interrupt pointer No. Description Interrupt module I0 to 15 Interrupt input from the interrupt module Note9.20 factor Interrupt from the special function module that...

  • Page 537: List Of Interrupt Pointer Nos And Interrupt Factors

    DEVICE EXPLANATION 9.10.1 List of interrupt pointer Nos and interrupt factors The following table lists the interrupt pointer Nos. and interrupt factors of each CPU module. (1) Basic model QCPU Table9.19 Interrupt pointer No. and interrupt factor list (Basic model QCPU) Priority I No.
  • Page 538 DEVICE EXPLANATION (2) High Performance model QCPU Table9.20 Interrupt pointer No. and interrupt factor list (High Performance model QCPU) Priority Priority I No. Interrupt Factors I No. Interrupt Factors Ranking Ranking Errors that stop 1st point operation 2nd point Empty 3rd point UNIT VERIFY ERR.
  • Page 539 DEVICE EXPLANATION * 1 : 1st to 12th points are allocated in order, beginning from the sequence start generator module installed closest to the High Performance model QCPU. * 2 : The time-out period of the internal timer is a default value. It can be changed in 0.5ms units within the range 0.5ms to 1000ms in the PLC system setting of the PLC parameter dialog box.
  • Page 540 DEVICE EXPLANATION (3) Process CPU Table9.21 Interrupt pointer number and interrupt factor list (Process CPU) Priority Priority I No. Interrupt Factors I No. Interrupt Factors Ranking Ranking Errors that stop 1st point operation 2nd point Empty 3rd point UNIT VERIFY ERR. 4th point FUSE BREAK OFF 5th point...
  • Page 541 DEVICE EXPLANATION * 1 : The time-out period of the internal timer is a default value. It can be changed in 0.5ms units within the range 0.5ms to 1000ms in the PLC system setting of the PLC parameter dialog box. * 2 : When an error interrupt with "I32 (error that stops operation)"...
  • Page 542 DEVICE EXPLANATION (4) Redundant CPU Table9.22 Interrupt pointer No. and interrupt factor list (Redundant CPU) Priority Priority I No. Interrupt Factors I No. Interrupt Factors Ranking Ranking 1st point Errors that stop operation 2nd point SINGLE PS. DOWN 3rd point UNIT VERIFY ERR.

  • Page 543: Other Devices

    DEVICE EXPLANATION 9.11 Other Devices 9.11.1 SFC block device (BL) This device is used for checking if the block designated by the SFC program is valid. Refer to the following manual for how to use the SFC block device. QCPU (Q Mode)/QnACPU Programming Manual (SFC) Basic 9.11.2 SFC transition device (TR)Note21...

  • Page 544: I/O No. Designation Device (U)

    DEVICE EXPLANATION 9.11.4 I/O No. designation device (U) (1) Definition I/O No. designation devices are used with instructions dedicated to intelligent function module to designate I/O numbers. (2) Designating the I/O No. designation device I/O No. designation devices are designated with the intelligent function module instructions as shown in Diagram 9.86.

  • Page 545: Macro Instruction Argument Device (Vd)

    DEVICE EXPLANATION 9.11.5 Macro instruction argument device (VD) (1) Definition Macro instruction argument devices are used with ladders registered as macros. When a VD setting is designated for a ladder registered as a macro, conversion to the designated device is performed when the macro instruction is executed. (2) Designating macro instruction argument devices Specify the devices transferred from sequence programs to macro registration ladders as macro instruction argument devices among the devices used in the...
  • Page 546 DEVICE EXPLANATION POINT 1. With the macro instruction argument device, VD0 to 9 can be used in one ladder registered as a macro instruction. 2. The GX Developer read mode provides an option to view a program in macro instruction format. (To change the display, choose [View] [Display macro instruction format].) Change of macro...

  • Page 547: Constants

    DEVICE EXPLANATION 9.12 Constants 9.12.1 Decimal constant (K) (1) Definition Decimal constants are devices that designate decimal data in sequence programs. Specify it as K (example: K1234) in a sequence program. It is stored in binary (BIN) into the CPU module. ( Section 3.9.1) (2) Designation range The designation ranges for decimal constants are as follows:...

  • Page 548: Real Number (E)

    DEVICE EXPLANATION 9.12.3 Real number (E)Note22 Basic Note9.22 (1) Definition Real numbers are devices which designate real numbers in the sequence program. Specify it as E (example: K1234) in a sequence program.( Section 3.9.4) EMOVP E1.234 D0 Diagram 9.89 Specifying the real number (2) Designation range The setting ranges for real numbers are as follows: -126...

  • Page 549: Convenient Usage Of Devices

    DEVICE EXPLANATION 9.13 Convenient Usage of Devices When executing multiple programs in the CPU module, local devices among the internal Basic user devices can be designated to execute each of the programs in an independent Note9.24 manner. Note24 Note9.24 Basic 9.13.1 Global devices and local devicesNote25 Note9.25...
  • Page 550 DEVICE EXPLANATION POINT 1. The devices that have not been set as local devices ( (2) in this section) are all global devices. 2. When executing multiple programs, the "shared range" for all programs, and the "independent range" for each program must be designated in advance.( (2) in this section) Example: Internal relay...

  • Page 551: Timer (T) ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••

    DEVICE EXPLANATION (2) Local devices Local devices are used independently by the programs. The use of local devices permits programming of multiple "independent execution" programs without regard to other programs. However, the local device data can be stored into the standard RAM and memory card only.
  • Page 552 DEVICE EXPLANATION POINT The local device may not be designated with some instructions. Refer to the allowable device in the programming manual of each instruction for details. Remark Refer to Section 9.2 for the concept of the number of words of the devices used as local devices.
  • Page 553 DEVICE EXPLANATION (c) Local device designation 1) Setting the ranges of devices used as local devices When using as local devices, set the ranges of the devices used as local devices in the device of the PLC parameter dialog box. Diagram 9.94 Device Note that the range designated for local devices applies to all programs, and cannot be changed for individual programs.
  • Page 554 DEVICE EXPLANATION 2) Setting the drive and file name where local devices will be stored After setting the ranges of the devices used as local devices, set the drive and file name, where the local device file will be stored, in the PLC file of the PLC parameter dialog box.
  • Page 555 DEVICE EXPLANATION 3) Write of settings Write the settings made in above 1), 2) to the CPU module. To write them, execute [Write to PLC] on GX Developer. Diagram 9.97 Write to device memory When data is to be written to the CPU module, whether the local devices set in the PLC file setting of the PLC parameter dialog box will be used or not can be selected.
  • Page 556 DEVICE EXPLANATION (d) Using local devices used by the file where a subroutine program is stored It is possible to use local devices that are used by the file where a subroutine program is stored when executing a subroutine program. Whether or not such local devices are used is set by special relay (SM776) ON/ OFF setting.
  • Page 557 DEVICE EXPLANATION 3) Precautions • If SM776 is ON, the local device data is read when the subroutine program is called and the local device data is saved after the execution of the RET instruction. Accordingly, scan time is elongated by the time as when a subroutine program is executed once with the setting of "SM776: ON".
  • Page 558 DEVICE EXPLANATION 2) Operation at "SM777 : ON" File name: DEF File name: ABC (Stand-by type program) DECP Occurrence of interrupt Execution of the Interrupt program INCP interrupt program IRET Read/write of the local devices Local devices used by Local devices used by the file name: ABC the file name: DEF Diagram 9.102 When SM777 is ON...

  • Page 559: Chapter10 Cpu Module Processing Time

    CPU MODULE PROCESSING TIME CHAPTER10 CPU MODULE PROCESSING TIME This chapter explains the CPU module processing time. 10.1 Scan Time This section explains the scan time structures and CPU module processing time. 10.1.1 Scan time structure The CPU module scan time consists of the followings processings. The CPU module performs the following processings cyclically in the RUN status.
  • Page 560 CPU MODULE PROCESSING TIME (2) Scan time structure of High Performance model QCPU or Process CPU Processing in RUN status Program check I/O refresh time I/O refresh Section 10.1.2 (1)) END processing of DUTY instruction END processing time and (No processing performed the relevant instruction when DUTY instruction is not executed) Section 10.1.2 (3))
  • Page 561 CPU MODULE PROCESSING TIME (3) Scan time structure of Redundant CPU Processing in RUN status Program check I/O refresh time I/O refresh Section 10.1.2 (1)) Tracking processing Control/Standby Backup mode/Standby system system identification Tracking processing time Section 10.1.2 (2)) Backup/Separate mode identification Backup mode/Control system Separate mode/Control system...

  • Page 562: Time Required For Each Processing Included In Scan Time

    Q5 B, Q6 B, Q5 B, Q6 B, Q3 SB, QA1S6 B Q3 SB, QA1S6 B Q6 RB Q6 RB Q3 RB Q3 RB Q00JCPU 2.05 s 2.95 s ---- 1.25 s 2.20 s ---- Q00CPU 2.00 s 2.75 s ---- 1.20 s...
  • Page 563 In this case, the END processing time changes with the number of times specified Note10.2 in the DUTY instruction.Note2 Table10.2 END processing during DUTY instruction execution END processing time CPU module When set to 1 When set to 5 Q00JCPU 0.15ms 0.21ms Q00CPU 0.14ms 0.19ms Q01CPU 0.12ms 0.16ms Q02CPU 0.02ms...
  • Page 564 Fixed scan interrupt (I28 to 31) processing QI60 (I0 to 15) CPU module Without high-speed With high-speed Without high-speed With high-speed start start start start Q00JCPU 175 s 150 s 350 s 325 s Q00CPU 145 s 125 s 285 s 265 s Q01CPU...
  • Page 565 CPU MODULE PROCESSING TIME Basic 1) Overhead time taken when local devices in interrupt program are made Note10.4 available Note4 Note10.4 When SM777 (setting of whether local devices in interrupt program are enabled or disabled) is turned ON to make the local devices in the interrupt program available, the following time is added to the overhead time in Table10.6 and Table10.7.
  • Page 566 (SM213 turns ON) is issued. Table10.8 Calendar update processing time END processing time CPU module When clock data set request When clock data read request is issued is issued Q00JCPU 1.25 ms 0.04 ms Q00CPU 0.99 ms 0.03 ms Q01CPU 0.98 ms 0.02 ms...
  • Page 567 (Refresh time) = KN1 + KN2 (number of refresh points) Use the following values in Table10.10 for KN1 and KN2. Table10.10 When intelligent function module is mounted on main base unit CPU module Q00JCPU 115 s 55 s Q00CPU 91 s...
  • Page 568 CPU MODULE PROCESSING TIME Table10.11 When intelligent function module is mounted on extension base unit CPU module Q00JCPU 120 s 56 s Q00CPU 92 s 48 s Q01CPU 86 s 43 s Q02CPU 61 s 15 s Q02HCPU, Q06HCPU, Q12HCPU, Q25HCPU,...
  • Page 569 (9) Common processing time This indicates the processing time common to the CPU modules. Table10.15 shows the common processing time for each CPU module model. Table10.15 Common processing time CPU module Common processing time Q00JCPU 0.66ms Q00CPU 0.60ms Q01CPU 0.52ms Q02CPU 0.38ms...

  • Page 570: Factors That Increase The Scan Time

    CPU MODULE PROCESSING TIME 10.1.3 Factors that increase the scan time When the following functions or operations are performed, this will increase the scan time of the CPU module. When executing any of them, make sure to allow for the processing time (the value given in this section to the value calculated in Section 10.1.2).
  • Page 571 CPU MODULE PROCESSING TIME Note10.8 Basic (2) Use of local devices Note9 When local devices are used, the following processing time shown in Table10.17 is Note10.8 required. Table10.17 Local device setting: Processing time for 10k points CPU module Processing time Q02CPU 3.47 + 0.05 n ms...
  • Page 572 CPU MODULE PROCESSING TIME Basic Note10.9 (3) Overheard time taken to execute multiple programs Note10 This indicates the overhead time taken to execute multiple programs by the CPU Note10.9 module. When multiple programs are executed, the following processing time shown in Table10.20 is required.
  • Page 573 Table10.23. Table10.23 Time increased when steps for online program change are re-set Allocate memory for online program change CPU module model name No change Re-setting Q00JCPU Max. 2.1ms Max. 30ms Q00CPU Max. 1.7ms Max. 26ms Q01CPU Max.
  • Page 574 12 intelligent function modules mounted on one extension base unit. Table10.25 Scan time increased when system monitor is used (When a total of 12 intelligent function modules are mounted) CPU module model name Scan time increase Q00JCPU 0.036ms Q00CPU 0.015ms Q01CPU 0.011ms...

  • Page 575: Factors That Can Shorten Scan Time By Changing The Settings

    CPU MODULE PROCESSING TIME 10.1.4 Factors that can shorten scan time by changing the settings The scan time can be shortened by changing the PLC parameter settings of GX Developer described in this section. Note10.11 Basic Redundant (1) A series CPU compatibility setting ( Section 8.1.2(2)) Note12 The scan time can be shortened by the processing time indicated in Table10.26 by...
  • Page 576 CPU MODULE PROCESSING TIME Basic Process Redundant Note10.12 (2) Floating point arithmetic processing ( Section 8.1.2(2)) Note13 Note10.12 Note10.12 Note10.12 The time required for the arthmetic processing of the instruction using a floating point can be shortened by selecting "Do not perform internal operation processing with double precision"...
  • Page 577 CPU MODULE PROCESSING TIME Note10.13 Basic (3) File usability setting ( Section 8.1.2(7)) Note14 In the program that does not use the file register, device initial value or device Note10.13 comment file, the overhead time of the program can be shortened by selecting "Not used"...
  • Page 578 CPU MODULE PROCESSING TIME POINT Time reduction by this setting is enabled only when "Use the same file name as the program" is selected in the PLC file. Valid only when setting is "Use the same file name as program". Diagram 10.8 PLC file 10.1 Scan Time - 20...

  • Page 579: Other Processing Times

    With monitor, CPU module without user without user with user interrupt with user interrupt interrupt interrupt Sum of the following times Q00JCPU 0.20ms 0.90ms 1) Time indicated in the "With Interrupt program execution monitor, without user Q00CPU 0.12ms 0.60ms time (refer to Section 10.1.2 (4) interrupt"...

  • Page 580: Chapter11 Procedure For Writing Program To Cpu Module 11 - 1 To

    CPU module. ( Section 5.4.3(1)) The program capacities executable in CPU modules are shown in Table11.1. Table11.1 Program capacity of Basic model QCPU CPU module Program capacity Q00JCPU 8k steps (32k bytes) Q00CPU 8k steps (32k bytes) Q01CPU 14k steps (56k bytes)

  • Page 581: Hardware Check

    Is the RUN LED on? To Section 11.1.3 Is the ERR. LED off? Please contact your nearest local Mitsubishi service center or representative, explaining a detailed description of the problem. Choose [Diagnosis] [System monitor] on GX Developer or perform PLC...
  • Page 582 PROCEDURE FOR WRITING PROGRAM TO CPU MODULE Remark Refer to the following manual for the installation and mounting procedures of the CPU module. QCPU User's Manual (Hardware Design, Maintenance and Inspection) 11.1 Basic Model QCPU 11.1.2 Hardware check...

  • Page 583: Procedure For Writing Program

    PROCEDURE FOR WRITING PROGRAM TO CPU MODULE 11.1.3 Procedure for writing program This section explains the procedure for writing the parameters and program created by GX Developer to the Basic model QCPU. This section explains the procedure for writing a program to the program memory ( Section 5.1.2).
  • Page 584 PROCEDURE FOR WRITING PROGRAM TO CPU MODULE Use the device initial value? Set the device memory. Section 6.26 Section 6.26 Set the device initial value range. In the PLC file setting of the PLC Section 6.26 parameter dialog box, set the device initial value to "Use"...

  • Page 585: Boot Run Procedure

    PROCEDURE FOR WRITING PROGRAM TO CPU MODULE 11.1.4 Boot run procedure This section explains a boot run procedure. In the following procedure, indicates the operation on the GX Developer side, and indicates that on the Basic model QCPU side. Start (Continued from Section 11.1.3) When the RUN/STOP/RESET switch is in the RUN position, set the switch to the STOP position.

  • Page 586: High Performance Model Qcpu, Process Cpu, Redundant Cpu

    PROCEDURE FOR WRITING PROGRAM TO CPU MODULE 11.2 High Performance Model QCPU, Process CPU, Redundant CPU 11.2.1 Items to be examined for program creation When creating programs by the CPU module, it is necessary to predetermine the program capacity, device points, file name and others of each program. (1) Program size considerations Check that CPU module's program capacity is adequate for storing the program and parameter data.

  • Page 587: Hardware Check

    PROCEDURE FOR WRITING PROGRAM TO CPU MODULE 11.2.2 Hardware check Make a hardware check before writing the created program. In the following procedure, indicates the operation on the GX Developer side, and indicates that on the High Performance model QCPU, Process CPU or Redundant CPU side.
  • Page 588 Is the RUN LED of the CPU module To Section 11.2.3 Is the ERR. LED off? Please contact your nearest local Mitsubishi service center or representative, explaining a detailed description of the problem. Choose [Diagnosis] [System monitor] on GX Developer or perform PLC...

  • Page 589: Procedure For Writing One Program

    PROCEDURE FOR WRITING PROGRAM TO CPU MODULE 11.2.3 Procedure for writing one program This section explains the procedure for writing the parameters and program created by GX Developer to the High Performance model QCPU, Process CPU or Redundant CPU. This section explains the procedure for writing a program to the program memory Section 5.2.2).
  • Page 590 PROCEDURE FOR WRITING PROGRAM TO CPU MODULE Use the device initial value? Set the device memory. Section 6.26 Set the device initial value range. Section 6.26 In the PLC file setting of the PLC Section 6.26 parameter dialog box, set the device initial value file name.
  • Page 591 PROCEDURE FOR WRITING PROGRAM TO CPU MODULE Choose [Online] [Format PLC Write to PLC screen memory] on GX Deveoper, and format the program memory..... Choose [Online] [Write to PLC] on GX Deveoper, and write the parameters, created program and device initial values. Power the PLC OFF and then ON, or QCPU User's Manual reset the CPU module.

  • Page 592: Procedure For Writing Multiple Programs

    PROCEDURE FOR WRITING PROGRAM TO CPU MODULE 11.2.4 Procedure for writing multiple programs This section explains the procedure for writing the parameters and multiple programs created by GX Developer to the High Performance model QCPU, Process CPU or Redundant CPU. This section explains the procedure for writing the programs to the program memory Section 5.2.2).
  • Page 593 PROCEDURE FOR WRITING PROGRAM TO CPU MODULE Use the device initial value? Set the device memory. Section 6.26 Set the device initial value range. Section 6.26 In the PLC file setting of the PLC Section 6.26 parameter dialog box, set the device initial value file name.
  • Page 594 PROCEDURE FOR WRITING PROGRAM TO CPU MODULE Connect the personal computer, which is installed with GX Developer, to the CPU module. Set the RUN/STOP switch to STOP and the RESET/L.CLR switch to the neutral position, and power ON the PLC (the ERR.

  • Page 595: Boot Run Procedure

    PROCEDURE FOR WRITING PROGRAM TO CPU MODULE 11.2.5 Boot run procedure This section explains a boot run procedure. In the following procedure, indicates the operation on the GX Developer side, and indicates that on the Basic model QCPU side. Start (Continued from Section 11.2.3,11.2.4) When the RUN/STOPT switch is in the RUN position, set the switch to the...

  • Page 596: Appendices

    APPENDICES APPENDICES Appendix 1 Special Relay List Special relays, SM, are internal relays whose applications are fixed in the PLC. For this reason, they cannot be used by sequence programs in the same way as the normal internal relays. However, they can be turned ON or OFF as needed in order to control the CPU module and remote I/O modules.

  • Page 597: Reset Operation

    APPENDICES (1) Diagnostic Information TableApp.2 Special relay Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When Set) • Turns ON if an error occurs as a result of diagnosis. (Includes when an annunciator is ON, and when an Qn(H) error is detected with CHK instruction) S (Error)
  • Page 598 APPENDICES TableApp.2 Special relay Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When Set) • ON when operation error is generated OFF : Normal SM56 Operation Errors • Remains ON if the condition is restored to normal S (Error) M9011 ON : Operation error...
  • Page 599 APPENDICES (2) System information TableApp.3 Special relay Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When Set) • When this relay goes from OFF to ON, the LEDs Qn(H) SM202 LED OFF command ON : LED OFF corresponding to the individual bits at SD202 go off QnPH QnPRH...
  • Page 600 APPENDICES TableApp.3 Special relay Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When Set) • Goes OFF when the No. 4 CPU is normal (including OFF : No. 4 CPU normal a continuation error). Qn(H) SM247 No. 4 CPU error flag ON : No.
  • Page 601 APPENDICES TableApp.3 Special relay Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When Set) Presence/absence of OFF : SFC program absent • Turns ON when an SFC program is registered. SM320 S (Initial) M9100 SFC program ON : SFC program present •...
  • Page 602 APPENDICES (3) System clocks/counters TableApp.4 Special relay Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When Set) S (Every END SM400 Always ON • Normally is ON M9036 processing) S (Every END SM401 Always OFF • Normally is OFF M9037 processing) •...
  • Page 603 APPENDICES TableApp.4 Special relay Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When Set) SM420 User timing clock No.0 • Relay repeats ON/OFF switching at fixed scan M9020 intervals. SM421 User timing clock No.1 M9021 • When PLC power supply is turned OFF or a CPU SM422 User timing clock No.2 M9022...
  • Page 604 APPENDICES (6) Memory cards TableApp.7 Special relay Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When Set) Memory card (A) OFF : Unusable SM600 • ON when memory card (A) is ready for use by user S (Initial) usable flags ON : Use enabled Memory card (A)
  • Page 605 APPENDICES TableApp.7 Special relay Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When Set) OFF : File register not used SM640 File register use • Goes ON when file register is in use S (Status change) ON : File register in use OFF : File register not used SM650 Comment use...
  • Page 606 APPENDICES TableApp.8 Special relay Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When Set) OFF : During DI S (Instruction SM715 EI flag • ON when EI instruction is being executed. ON : During EI execution) • Turns on only during one scan when the processing Qn(H) OFF : Comment read not of the COMRD or PRC instruction is completed.
  • Page 607 APPENDICES TableApp.8 Special relay Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When Set) PID bumpless • Specify whether the set value (SV) will be matched processing OFF : Forces match Q00J/Q00/Q01 SM774 with the process value (PV) or not in the manual (for complete ON : Does not force match Qn(H)
  • Page 608 APPENDICES TableApp.9 Special relay Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When Set) Qn(H) Trace completed • Switches ON at completion of trace S (Status change) M9043 QnPH OFF : Not completed QnPRH SM805 ON : End Sampling trace •...
  • Page 609 APPENDICES (10)A to Q/QnA conversion correspondences Special relays SM1000 to SM1255 are the relays which correspond to ACPU special relays M9000 to M9255 after A to Q/QnA conversion. (However, the Basic model QCPU and Redundant CPU do not support A to Q/QnA conversion.) These special relays are all set by the system, and cannot be set by the user program.

  • Page 610: Power Supply Module

    APPENDICES TableApp.11 Special relay ACPU Special Special Special Relay after Relay for Name Meaning Details Corresponding CPU Relay Conversion Modification • Turns ON if an instantaneous power failure of within 20ms occurs during use of the AC power supply module. Qn(H) •...
  • Page 611 APPENDICES TableApp.11 Special relay ACPU Special Special Special Relay after Relay for Name Meaning Details Corresponding CPU Relay Conversion Modification • Alternates between ON and OFF according to the seconds specified at SD414. (Default: n = 30) 2n minute clock(1 •...
  • Page 612 APPENDICES TableApp.11 Special relay ACPU Special Special Special Relay after Relay for Name Meaning Details Corresponding CPU Relay Conversion Modification OFF : Other than when P, I Main side P, I set set being requested M9056 SM1056 request ON : P, I set being •...
  • Page 613 APPENDICES TableApp.11 Special relay ACPU Special Special Special Relay after Relay for Name Meaning Details Corresponding CPU Relay Conversion Modification OFF : Continuous transition Presence/absence • Set whether continuous transition will be performed for the not effective M9103 SM1103 SM323 of continuous block where the "continuous transition bit"...
  • Page 614 APPENDICES TableApp.11 Special relay ACPU Special Special Special Relay after Relay for Name Meaning Details Corresponding CPU Relay Conversion Modification ZNRD instruction • Depends on whether or not the ZNRD (word device read) (LRDP instruction instruction has been received. OFF : Not accepted M9200 SM1200 ----...
  • Page 615 APPENDICES TableApp.11 Special relay ACPU Special Special Special Relay after Relay for Name Meaning Details Corresponding CPU Relay Conversion Modification Local station, remote I/O station OFF : No errors Depends on whether or not a local or a remote I/O station M9235 SM1235 ----...
  • Page 616 APPENDICES (11)Process control instructions TableApp.12 Special relay Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When Set) • Specifies whether or not to hold the output value OFF : No-hold SM1500 Hold mode when a range over occurs for the S.IN instruction ON : Hold Q4AR range check.

  • Page 617: Specifications

    APPENDICES TableApp.13 Special relay Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When Set) • Turns on when the CPU module is started up by the S (Status operation system switch. Q4AR change)/U • Reset using the user program. OFF : Power supply on CPU module startup startup...
  • Page 618 APPENDICES TableApp.13 Special relay Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When Set) SM1549 SM1549 Block 30 SM1550 SM1550 Block 31 SM1551 SM1551 Block 32 SM1552 SM1552 Block 33 SM1553 SM1553 Block 34 SM1554 SM1554 Block 35 SM1555 SM1555 Block 36...
  • Page 619 APPENDICES TableApp.13 Special relay Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When Set) OFF : Memory copy not Memory copy to other completed • Turns on once the memory copying to the other SM1597 system completion S (finish)/U ON : Memory copy system has completed.
  • Page 620 APPENDICES (14)For redundant system (tracking) Either the backup mode or the second mode is valid for SM1700 to SM1799. All is turned off for standalone system. TableApp.15 Special relay Correspon Set by ding host Number Name Meaning Explanation Corresponding CPU (When Set) Tracking execution OFF : Execution not possible...
  • Page 621 APPENDICES TableApp.15 Special relay Correspon Set by ding host Number Name Meaning Explanation Corresponding CPU (When Set) SM1712 SM1712 Block 1 SM1713 SM1713 Block 2 SM1714 SM1714 Block 3 SM1715 SM1715 Block 4 SM1716 SM1716 Block 5 SM1717 SM1717 Block 6 SM1718 SM1718 Block 7...

  • Page 622: Base Unit

    APPENDICES TableApp.15 Special relay Correspon Set by ding host Number Name Meaning Explanation Corresponding CPU (When Set) SM1747 SM1747 Block 36 SM1748 SM1748 Block 37 SM1749 SM1749 Block 38 SM1750 SM1750 Block 39 SM1751 SM1751 Block 40 SM1752 SM1752 Block 41 SM1753 SM1753 Block 42...

  • Page 623: Appendix 2 Special Register List

    APPENDICES Appendix 2 Special Register List The special registers, SD, are internal registers with fixed applications in the PLC. For this reason, it is not possible to use these registers in sequence programs in the same way that normal registers are used. However, data can be written as needed in order to control the CPU modules and remote I/O modules.
  • Page 624 APPENDICES (1) Diagnostic Information TableApp.18 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When set) D9008 Diagnostic Diagnosis error • Error codes for errors found by diagnosis are stored as BIN data. S (Error) format errors code •...
  • Page 625 APPENDICES TableApp.18 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When set) • Common information corresponding to the error codes (SD0) is stored here. • The following eight types of information are stored here: • The error common information type can be judged by the "common information category code"...
  • Page 626 APPENDICES TableApp.18 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When set) Time (value set) Number Meaning Time : 1 s units (0 to 999 s) Time : 1ms units (0 to 65535ms) SD10 (Vacancy) SD11 SD12 SD13 SD14...
  • Page 627 APPENDICES TableApp.18 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When set) Reason(s) for system switching Number Meaning System switching condition Control system switching instruction argument SD10 (Vacancy) SD11 SD12 SD13 SD14 SD15 *13: Details of reason(s) for system switching 0 : No system switching condition (default) 1 : Power OFF, reset, hardware failure,...
  • Page 628 APPENDICES TableApp.18 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When set) Tracking transmission data classification Stores the data classification during tracking. Number Meaning Data type SD10 (Vacancy) SD11 SD12 SD13 SD14 SD15 *15: Details of data classification Error common Error common SD10...
  • Page 629 APPENDICES TableApp.18 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When set) • Individual information corresponding to error codes (SD0) is stored here. • There are the following eight different types of information are stored. • The error individual information type can be judged by the "individual SD16 information category code"...
  • Page 630 APPENDICES Remark *6 : Extensions are shown in TableApp.19. TableApp.19 Extension name SDn+1 Extension File type Higher8 bits Lower8 bits Higher8 bits name Parameters Sequence program/SFC program Device comment Device initial value (Other than the Basic model QCPU) File register Simulation data (Other than the Basic model QCPU) Local device...
  • Page 631 APPENDICES TableApp.18 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When set) Reason(s) for system switching failure Number Meaning System switching prohibition SD16 condition 14 SD17 SD18 SD19 SD20 SD21 (Vacancy) SD22 SD23 SD24 SD25 SD26 *14: Details of reason(s) for system switching failure Error common Error common...
  • Page 632 APPENDICES TableApp.18 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When set) When any of X(n+0)/X(n+20), X(n+6)/X(n+26), X(n+7)/X(n+27) and X(n+8)/X(n+28) of the mounted MINI(-S3) turns ON, the bit of the corresponding station turns to 1 (ON). Turns to 1 (ON) when communication between the mounted MINI(- S3) and CPU module cannot be made.
  • Page 633 APPENDICES TableApp.18 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When set) Corresponds to SD90 D9108 SM90 • Set the annunciator number (F number) that will be turned ON when the step transition watchdog Corresponds to SD91 D9109 timer setting or watchdog timer time limit error...
  • Page 634 APPENDICES TableApp.18 Special register Corres- ponding Corresponding Set by Number Name Meaning Explanation ACPU (When set) • The numbers of output modules whose fuses have blown are input as a SD130 bit pattern (in units of 16 points). (If the module numbers are set by parameter, the parameter-set SD131 numbers are stored.) Bit pattern in units...
  • Page 635 APPENDICES (2) System information TableApp.20 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When set) • The switch status of the remote I/O module is stored in the following format. b4 b3 S (Always) Vacancy 1) Remote I/O module switch statusAlways 1: STOP •...
  • Page 636 APPENDICES TableApp.20 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When set) • The following bit patterns are used to store the statuses of the LEDs on the CPU module: • 0 is off, 1 is on, and 2 is flicker. b12b11 b8 b7 b4 b3...
  • Page 637 APPENDICES TableApp.20 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When set) 0: Test not yet executed 1: During X device Device test test SD206 • Set when the device test mode is executed on GX Developer. S (Request) 2: During Y device execution type...
  • Page 638 APPENDICES TableApp.20 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When set) • Stores the year (two digits) and the day of the week in SD213 in the BCD code format as shown below. Example: 1993, Friday 1905 Clock data QCPU...
  • Page 639 APPENDICES TableApp.20 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When set) Fixed to 0 Base type Main base unit differentiation Qn(H) 1st extension 0: QA**B is A/Q base QnPH base S (Initial) installed differentiation QnPRH 0 fixed (A mode) 2nd extension...
  • Page 640 APPENDICES TableApp.20 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When set) Number of • Indicates the number of mounted MELSECNET/10 modules or SD254 modules installed MELSECNET/H modules. • Indicates I/O number of mounted MELSECNET/10 module or SD255 I/O No.
  • Page 641 APPENDICES TableApp.20 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When set) Number of points SD297 • Stores the number of points currently set for V devices allocated for V Number of points SD298 • Stores the number of points currently set for S devices allocated for S Number of points SD299...
  • Page 642 APPENDICES TableApp.20 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When set) No. of modules SD340 • Indicates the number of mounted Ethernet module. installed SD341 I/O No. • Indicates I/O number of mounted Ethernet module Network SD342 •...
  • Page 643 APPENDICES TableApp.20 Special register Corres- ponding Set by Corresponding Number Name Meaning Explanation ACPU (When set) Number of • The number of CPU modules that comprise the multiple PLC system is SD393 multiple CPUs stored. (1 to 3, Empty also included) •...
  • Page 644 APPENDICES (4) Scan information TableApp.22 Special register Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When set) Execution Program No. in • Program number of program currently being executed is stored as BIN S (Status Qn(H) SD500 program No.
  • Page 645 APPENDICES TableApp.22 Special register Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When set) END processing • Stores the time from when the scan program ends until the next scan SD540 time (in 1 ms starts into SD540 and SD541. units) END processing S (Every END...
  • Page 646 APPENDICES (5) Memory card TableApp.23 Special register Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When set) • Indicates memory card model installed b8 b7 b4 b3 Qn(H) Drive 1 0: Does not exist Memory card Memory card S (Initial and (RAM) QnPH...
  • Page 647 APPENDICES TableApp.23 Special register Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When set) • Indicates the drive 3/4 models. Qn(H) Drive 3 S (Initial) QnPH (Standrd Fixed to 1 QnPRH RAM) Drive 4 (Standrd Fixed to 3 Drive 3/4 ROM) Drive 3/4 models...
  • Page 648 APPENDICES TableApp.23 Special register Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When set) Drive 3 SD622 (Standard RAM) Drive 3 capacity • Drive 3 capacity is stored in 1kbyte units. S (Initial) capacity Drive 4 SD623 (Standard Drive 4 capacity •...
  • Page 649 APPENDICES TableApp.23 Special register Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When set) Boot designation • Stores the drive number where the boot designation file (*.QBT) is being SD660 S (Initial) file drive number stored. • Stores the file name of the boot designation file (*.QBT). SD661 SD662 SD661...
  • Page 650 APPENDICES TableApp.24 Special register Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When set) SD738 • Stores the message designated by the MSG instruction. SD739 SD740 2nd character 1st character SD738 SD741 SD739 4th character 3rd character SD742 SD740 6th character...
  • Page 651 APPENDICES TableApp.24 Special register Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When set) Remaining No. of simultaneous execution of • Stores the remaining number of simultaneous execution of the CC-Link SD780 0 to 32 CC-Link dedicated instructions. dedicated instruction •...
  • Page 652 APPENDICES (7) Debug TableApp.25 Special register Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When set) • Stores file name (with extension) from point in time when status latch SD806 was conducted as ASCII code. SD807 SD806 2nd character 1st character SD808...
  • Page 653 APPENDICES (8) Latch area TableApp.26 Special register Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When set) Drive where Access file drive S (Status SD900 power was number during • Stores drive number if file was being accessed during power loss. change) interrupted power loss...
  • Page 654 APPENDICES (10)A to Q/QnA conversion ACPU special registers D9000 to D9255 correspond to Q/QnA special registers SD1000 to SD1255 after A to Q/QnA conversion. (However, the Basic model QCPU and Redundant CPU do not support A to Q/QnA conversion.) These special registers are all set by the system, and cannot be set by the user program.
  • Page 655 APPENDICES TableApp.28 Special register Special ACPU Special Register Special Register for Name Meaning Details Corresponding CPU after Conversion Modification Conversion • When fuse blown modules are detected, the first I/O number of the lowest number of the detected modules is stored in hexadecimal. (Example: When fuses of Y50 to 6F output modules have blown, "50"...
  • Page 656 APPENDICES TableApp.28 Special register Special ACPU Special Register Special Register for Name Meaning Details Corresponding CPU after Conversion Modification Conversion OUT F • When one of F0 to 255 is turned on by Qn(H) SET F , the F number, which has been detected earliest among QnPH the F numbers which have turned on, is stored in BIN code.
  • Page 657 APPENDICES TableApp.28 Special register Special ACPU Special Register Special Register for Name Meaning Details Corresponding CPU after Conversion Modification Conversion 0: Main program (ROM) 1: Main program (RAM) 2: Subprogram 1 (RAM) 3: Subprogram 2 (RAM) 4: Subprogram 3 (RAM) 5: Subprogram 1 (ROM) Program...
  • Page 658 APPENDICES TableApp.28 Special register Special ACPU Special Register Special Register for Name Meaning Details Corresponding CPU after Conversion Modification Conversion • Stores the day of the week in BCD. Example: Friday H0005 Day of the week Clock data D9028 SD1028 Clock data Sunday (day of week)
  • Page 659 APPENDICES TableApp.28 Special register Special ACPU Special Register Special Register for Name Meaning Details Corresponding CPU after Conversion Modification Conversion Transition condition • Stores the transition condition number, where error code 84 occurred D9053 SD1053 Error transition number where error in an SFC program, in BIN value.
  • Page 660 APPENDICES TableApp.28 Special register Special ACPU Special Register Special Register for Name Meaning Details Corresponding CPU after Conversion Modification Conversion • Output module numbers (in units of 16 points), of which fuses have D9100 SD1100 blown, are entered in bit pattern. (Preset output module numbers when parameter setting has been performed.) D9101 SD1101...
  • Page 661 APPENDICES TableApp.28 Special register Special ACPU Special Register Special Register for Name Meaning Details Corresponding CPU after Conversion Modification Conversion SET F • When any of F0 to 2047 is turned on by , the annunciator D9125 SD1125 SD64 numbers (F numbers) that are turned on in order are registered into D9125 to D9132.
  • Page 662 APPENDICES (11)Special register list dedicated for QnA TableApp.29 Special register Special ACPU Special Register Special Register for Name Meaning Details Corresponding CPU after Conversion Modification Conversion Stores the execution result of the ZNRD (word device read) 0 : Normal end instruction 2 : ZNRD instruction •...
  • Page 663 APPENDICES TableApp.29 Special register Special ACPU Special Register Special Register for Name Meaning Details Corresponding CPU after Conversion Modification Conversion • Loopback in forward loop only 0 : Forward loop, during data link Master Station Station Station station 1 : Reverse loop, Station n No.1 No.2...
  • Page 664 APPENDICES TableApp.29 Special register Special ACPU Special Register Special Register for Name Meaning Details Corresponding CPU after Conversion Modification Conversion Local station parameters non-conforming; Stores conditions for D9220 SD1220 remote I/O up to numbers 1 to 16 Stores the local station numbers which contain mismatched station I/O parameters or of remote station numbers for which incorrect I/O allocation error...
  • Page 665 APPENDICES TableApp.29 Special register Special ACPU Special Register Special Register for Name Meaning Details Corresponding CPU after Conversion Modification Conversion Local station and remote I/O Stores conditions for D9232 SD1232 station loop up to numbers 1 to 8 error Stores the local or remote station number at which a forward or reverse loop error has occurred Local station and remote I/O...
  • Page 666 APPENDICES TableApp.29 Special register Special ACPU Special Register Special Register for Name Meaning Details Corresponding CPU after Conversion Modification Conversion Local station Stores conditions for D9248 SD1248 up to numbers 1 to 16 Stores the local station number which is in STOP or PAUSE mode. operation status Device number...
  • Page 667 APPENDICES (13)I/O module verification TableApp.31 Special register Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When set) SD1400 • When the I/O modules whose I/O module information differs from that D9116 registered at power on are detected, the numbers of those I/O modules SD1401 D9117 are entered in bit pattern.
  • Page 668 APPENDICES (15)For redundant systems (Host system CPU information SD1510 to SD1599 are only valid for redundant systems. They are all set to 0 for standalone systems. TableApp.33 Special register Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When set) Operation mode Hot start switch...
  • Page 669 APPENDICES TableApp.33 Special register Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When set) • Stores the reason(s) for system switching failure. 0: System switching normal (default) 1: Tracking cable is not connected , tracking cable error, FPGA circuit failure.
  • Page 670 APPENDICES (16)For redundant systems (Other system CPU information SD1600 to SD1659 is only valid during the back up mode for redundant systems, and refresh cannot be done when in the separate mode. SD1651 to SD1699 are valid in either the backup mode or separate mode. When a standalone system SD1600 to SD1699 are all 0.
  • Page 671 APPENDICES TableApp.34 Special register Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When set) • If an error is detected by the error check for redundant system, the corresponding bit shown below turns ON. That bit turns OFF when the error is cleared after that.
  • Page 672 APPENDICES TableApp.34 Special register Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When set) Stores the operation information of the other system CPU module in the following format. "00FF " I stored when a communication error occurs, or when in debug mode.
  • Page 673 APPENDICES (17)For redundant systems (Trucking) SD1700 to SD1779 is valid only for redundant systems. These are all 0 for standalone systems. TableApp.35 Special register Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When set) Trucking error Trucking error S(Error occur- Q4AR SD1700...
  • Page 674 APPENDICES (18)Redundant power supply module information SD1780 to SD1789 are valid only for a redundant power supply system. The bits are all 0 for a singular power supply system. TableApp.36 Special register Corres- ponding Set by Number Name Meaning Explanation Corresponding CPU ACPU (When set)

  • Page 675: Appendix 3 Comparison

    Function Version A Function Version B Specifications First 5 digits of serial No. are First 5 digits of serial No. are "04121" or earlier "04122" or later Q00JCPU Standard RAM capacity Q00CPU 64k bytes 128k bytes Q01CPU 64k bytes 128k bytes...
  • Page 676 *1 : When the CPU instruction installed by GX Developer Version 8 is read by GX Developer of Version 7 or earlier, it is processed as an "instruction code error" by GX Developer. *2 : Unsupported by the Q00JCPU. Appendix 3 Comparison - 81 Appendix 3.1 Basic model QCPU Upgrade...
  • Page 677 APPENDICES (3) Usability of New functions according to GX developer version TableApp.39 Usability of New functions according to GX developer version GX developer version New Function GX developer 7 or earlier GX Developer 8 MELSAP3 Function block Structured text (ST) language PID operation function Real number operation Intelligent function module event interruption...
  • Page 678 APPENDICES (4) Differences among Basic model QCPU models TableApp.40 Differences among Basic model QCPU models Item Q00JCPU Q00CPU Q01CPU CPU module, Power supply module, Main CPU module Stand-alone CPU module base unit (5 slots) Integrated type Main base unit/slim type main base unit...

  • Page 679: Appendix 3.2 High Performance Model Qcpu Upgrade

    APPENDICES Appendix 3.2 High Performance model QCPU Upgrade (1) Specification comparison TableApp.41 Specification comparison Serial No. of CPU Module Function Version A Function Version B Specifications 02091 or 02092 or later ---- 03051 or later 04012 or later earlier Q02CPU 64kbyte Q02HCPU 64kbyte...
  • Page 680 APPENDICES (2) Function comparison TableApp.42 Function comparison Serial No. of CPU Module Function Version A Function Version B New Function 02091 or 02092 or 03051 or 04012 or 04122 or 05032or ---- earlier later later later later later Automatic write to standard ROM Section 5.2.7) Enforced ON/OFF for external I/O Section 6.11.3)
  • Page 681 APPENDICES TableApp.42 Function comparison (Continued) Serial No. of CPU Module Function Version A Function Version B New Function 02091 or 02092 or 03051 or 04012 or 04122 or 05032or ---- earlier later later later later later CC-Link remote network additional mode CC-Link Manual) Incomplete derivative PID operation...
  • Page 682 APPENDICES (3) Usability of New functions according to GX developer TableApp.43 Usability of New functions according to GX developer GX Developer SW4D5C-GPPW-E New Function Version Version SW5D5C-GPPW-E Version 6 Version 7 Version 8 7.10L 8.03D Automatic write to standard ROM External I/O can be turned ON/OFF forcibly Remote password setting...

  • Page 683: Appendix 4 Precautions For Battery Transport

    2MBS (2) Transport guidelines Comply with IATA Dangerous Goods Regulations, IMDG code and the local transport regulations when transporting products after unpacking or repacking, while Mitsubishi ships products with packages to comply with the transport regulations. Also, contact the transporters.

  • Page 684: Appendix 5 Device Point Assignment Sheet

    APPENDICES Appendix 5 Device Point Assignment Sheet (1) For Basic model QCPU TableApp.45 Device Point Assignmene Sheet (For Basic model QCPU) *1*2 Restriction check Number of device points Numeric Device name Symbol Number of bit notation Number of points Number Capacity (Word) points Input relay...
  • Page 685 APPENDICES (2) For High Performance model QCPU, Process CPU, Redundant CPU TableApp.46 Device Point Assignmene sheet (For High Performance model QCPU, Process CPU, Redundant CPU) *1*2 Restriction check Number of device points Numeric Number of bit Device name Symbol Capacity ( words) notation Number of points Number...
  • Page 686 INDEX A series CPU compatibility setting ... 8-16 Data clear processing ..... 3-64 Access to AnS series corresponding special function Data register (D) .
  • Page 687 Flash card ......A-27,5-29 Intelligent function module dedicated instructions Floating decimal point data ....3-79 .
  • Page 688 Low-speed timers ......9-25 Program memory to ROM....5-34 Program setting .
  • Page 689 Service interval time ..... 6-157 Weight ........2-7 Setting using the GX Configurator.
  • Page 690 1. Gratis Warranty Term and Gratis Warranty Range If any faults or defects (hereinafter "Failure") found to be the responsibility of Mitsubishi occurs during use of the product within the gratis warranty term, the product shall be repaired at no cost via the sales representative or Mitsubishi Service Company.
  • Page 692 QCPU User's Manual (Function Explanation, Program Fundamentals) QCPU-U-KP-E MODEL MODEL 13JR74 CODE SH(NA)-080484ENG-A(0406)MEE HEAD OFFICE : 1-8-12, OFFICE TOWER Z 14F HARUMI CHUO-KU 104-6212,JAPAN NAGOYA WORKS : 1-14 , YADA-MINAMI 5-CHOME , HIGASHI-KU, NAGOYA , JAPAN When exported from Japan, this manual does not require application to the Ministry of Economy, Trade and Industry for service transaction permission.

This manual is also suitable for:

Q02hcpuQ00cpuQ06hcpuQ12hcpuQ25hcpuQ12phcpu ... Show all

Table of Contents